Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD 数据表
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产品代码
ATSAM4S-WPIR-RD
393
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
22.5.8 Cache Controller Monitor Enable Register
Name:
CMCC_MEN
Address:
0x4007C02C
Access:
Write-
only
Reset:
0x00
002000
• MENABLE: Cache Controller Monitor Enable
0: When set to 0, the monitor counter is disabled.
1: When set to 1, the monitor counter is activated.
1: When set to 1, the monitor counter is activated.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
MENABLE