Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD 数据表
产品代码
AT32UC3A3-XPLD
624
32072H–AVR32–10/2012
AT32UC3A3
27. Hi-Speed USB Interface (USBB)
Rev: 3.2.0.18
27.1
Features
•
Compatible with the USB 2.0 specification
•
Supports High (480Mbit/s), Full (12Mbit/s) and Low (1.5Mbit/s) speed Device and Embedded Host
•
eight pipes/endpoints
•
2368bytes of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
•
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
•
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
•
On-Chip UTMI transceiver including Pull-Ups/Pull-downs
•
On-Chip pad including VBUS analog comparator
27.2
Overview
The Universal Serial Bus (USB) MCU device complies with the Universal Serial Bus (USB) 2.0
specification, in all speeds.
specification, in all speeds.
Each pipe/endpoint can be configured in one of several transfer types. It can be associated with
one or more banks of a dual-port RAM (DPRAM) used to store the current data payload. If sev-
eral banks are used (“ping-pong” mode), then one DPRAM bank is read or written by the CPU or
the DMA while the other is read or written by the USBB core. This feature is mandatory for iso-
chronous pipes/endpoints.
one or more banks of a dual-port RAM (DPRAM) used to store the current data payload. If sev-
eral banks are used (“ping-pong” mode), then one DPRAM bank is read or written by the CPU or
the DMA while the other is read or written by the USBB core. This feature is mandatory for iso-
chronous pipes/endpoints.
describes the hardware configuration of the USB MCU device.
The theoretical maximal pipe/endpoint configuration (3648bytes) exceeds the real DPRAM size
(2368bytes). The user needs to be aware of this when configuring pipes/endpoints. To fully use
the 2368bytes of DPRAM, the user could for example use the configuration described in
(2368bytes). The user needs to be aware of this when configuring pipes/endpoints. To fully use
the 2368bytes of DPRAM, the user could for example use the configuration described in
.
Table 27-1.
Description of USB Pipes/Endpoints
Pipe/Endpoint
Mnemonic
Max. Size
Max. Nb. Banks
DMA
Type
0
PEP0
64 bytes
1
N
Control
1
PEP1
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
2
PEP2
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
3
PEP3
512 bytes
2
Y
Isochronous/Bulk/Interrupt
4
PEP4
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
5
PEP5
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
6
PEP6
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
7
PEP7
512 bytes
2
Y
Isochronous/Bulk/Interrupt/Control
Table 27-2.
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Pipe/Endpoint
Mnemonic
Size
Nb. Banks
0
PEP0
64 bytes
1