Linear Technology LTC2637-LZ12: 12-Bit Octal I²C DAC, req DC590 DC1534A-A DC1534A-A 数据表

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dc1532f

DEMO MANUAL DC1532

LTC2268-14/-12,  

LTC2267-14/-12, LTC2266-14/-12, LTC2265-14/-12, 

LTC2264-14/-12, LTC2263-14/-12 12-/14-Bit, 25Msps to 

125Msps Dual ADCs

Demonstration circuit 1532 supports a family of 14-/12- 

bit 25Msps to 125Msps ADCs. Each assembly features 

one of the following devices: LTC2268-14, LTC2268-12,  

LTC2267-14, LTC2267-12, LTC2266-14, LTC2266-12, 

LTC2265-14, LTC2265-12, LTC2264-14, LTC2264-12, 

LTC2263-14, LTC2263-12 high speed, dual ADCs.
The versions of the 1532A demo board are listed in Table 1. 

Depending on the required resolution and sample rate, 

the DC1532 is supplied with the appropriate ADC. The 

circuitry on the analog inputs is optimized for analog input 

frequencies from 5MHz to 140MHz. Refer to the data sheet 

for proper input networks for different input frequencies.
Design files for this circuit board are available at  

Supply Voltage – DC1532A

Depending on Sampling Rate and the A/D Converter 

Provided, this Supply Must Provide up to 500mA.

Optimized for 3V 

[3V 

⇔ 6.0V Min/Max]

Analog Input Range

Depending on SENSE Pin Voltage

1V

P-P

 to 2V

P-P

Logic Input Voltages

Minimum Logic High

1.3V

Maximum Logic Low

0.6V

Logic Output Voltages (Differential)

Nominal Logic Levels (100Ω Load, 3.5mA Mode)

350mV/1.25V Common Mode

Minimum Logic Levels (100Ω Load, 3.5mA Mode)

247mV/1.25V Common Mode

Sampling Frequency (Convert Clock Frequency)

See Table 1

Encode Clock Level

Single-Ended Encode Mode (ENC – Tied to GND)

0V to 3.6V

Encode Clock Level

Differential Encode Mode (ENC – Not Tied to GND)

0.2V to 3.6V

Resolution

See Table 1

Input Frequency Range

See Table 1

SFDR

See Applicable Data Sheet

SNR

See Applicable Data Sheet

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