Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK 数据表
产品代码
ATSAM4L-XSTK
500
42023E–SAM–07/2013
ATSAM4L8/L4/L2
20.7
Module Configuration
The specific configuration for each WDT instance is listed in the following tables.The module bus
clocks listed here are connected to the system bus clocks. Refer to
clocks listed here are connected to the system bus clocks. Refer to
for details.
Table 20-2.
WDT Clocks
Clock Name
Description
CLK_WDT
Clock for the WDT bus interface
Table 20-3.
Register Reset Values
Register
Reset Value
VERSION
0x00000501