Linear Technology DC1082A-D - LTC1403A, 14-bit 1-ch 2.8Msps SAR ADC (Unipolar, req DC890) DC1082A-D DC1082A-D 数据表

LTC1403/LTC1403A

1

1403fb

Serial 12-Bit/14-Bit, 2.8Msps

Sampling ADCs with Shutdown

The LTC

®

1403/LTC1403A are 12-bit/14-bit, 2.8Msps se-

rial ADCs with differential inputs. The devices draw only 
4.7mA from a single 3V supply and come in a tiny 10-lead 
MS package. A Sleep shutdown feature lowers power 
consumption to 10μW. The combination of speed, low 
power and tiny package makes the LTC1403/LTC1403A 
suitable for high speed, portable applications.

The 80dB common mode rejection allows users to eliminate 
ground loops and common mode noise by measuring 
signals differentially from the source.

The devices convert 0V to 2.5V unipolar inputs differentially. 
The absolute voltage swing for +A

IN

 and –A

IN

 extends from 

ground to the supply voltage.

The serial interface sends out the conversion results during 
the 16 clock cycles following CONV↑ for compatibility with 
standard serial interfaces. If two additional clock cycles 
for acquisition time are allowed after the data stream in 
between conversions, the full sampling rate of 2.8Msps 
can be achieved with a 50.4MHz clock.

■

  2.8Msps Conversion Rate

■

  Low Power Dissipation: 14mW

■

  3V Single Supply Operation

■

  –40°C to 125°C Guaranteed Operation

■

  2.5V Internal Bandgap Reference can be Overdriven

■

  3-Wire Serial Interface

■

  Sleep (10μW) Shutdown Mode

■

  Nap (3mW) Shutdown Mode

■

  80dB Common Mode Rejection

■

  0V to 2.5V Unipolar Input Range

■

  Tiny 10-Lead MS Package

■

 Automotive

■

 Communications

■

  Data Acquisition Systems

■

 Uninterrupted Power Supplies

■

  Multiphase Motor Control

■

  Multiplexed Data Acquisition

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. 

All other trademarks are the property of their respective owners.

–

+

1

2

7

3

4

S & H

GND

EXPOSED PAD

LTC1403A

V

REF

10

μF

A

IN

–

A

IN

+

14-BIT ADC

3V

10

μF

14

14-BIT LA

TCH

8

10

9

THREE-

STATE

SERIAL

OUTPUT

PORT

2.5V

REFERENCE

TIMING

LOGIC

V

DD

SDO

CONV

SCK

1403A TA01

5

6

11

FREQUENCY (MHz)

0.1

–80

THD, 2nd, SFDR, 3rd (dB)

–74

–68

–62

–56

1

10

100

1403A TA02

–86

–92

–98

–104

–50

–44

THD

3rd

2nd, SFDR