Nxp Semiconductors OM11043 数据表

LPC1769_68_67_66_65_64_63

All information provided in this document is subject to legal disclaimers.

© NXP Semiconductors N.V. 2014. All rights reserved.

 for an overview of the LPC17xx clock generation.

 

The IRC may be used as the clock source for the WDT, and/or as the clock that drives the 
PLL and subsequently the CPU. The nominal IRC frequency is 4 MHz. The IRC is 
trimmed to 1 % accuracy over the entire voltage and temperature range.

Upon power-up or any chip reset, the LPC17xx use the IRC as the clock source. Software 
may later switch to one of the other available clock sources.

The main oscillator can be used as the clock source for the CPU, with or without using the 
PLL. The main oscillator also provides the clock source for the dedicated USB PLL. 

The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be 
boosted to a higher frequency, up to the maximum CPU operating frequency, by the main 
PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock 
frequency is referred to as CCLK elsewhere in this document. The frequencies of 
PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The 
clock frequency for each peripheral can be selected individually and is referred to as 
PCLK. Refer to 

 for additional information.

The RTC oscillator can be used as the clock source for the RTC block, the main PLL, 
and/or the CPU. 

MAIN

OSCILLATOR

INTERNAL

RC

OSCILLATOR

RTC

OSCILLATOR

MAIN PLL

WATCHDOG

TIMER

REAL-TIME

CLOCK

CPU

CLOCK

DIVIDER

PERIPHERAL

CLOCK

GENERATOR

USB BLOCK

ETHERNET

BLOCK

DMA

GPIO

NVIC

USB

CLOCK

DIVIDER

system

clock

select

(CLKSRCSEL)

USB clock config

(USBCLKCFG)

CPU clock config

(CCLKCFG)

pllclk

CCLK/8

CCLK/6

CCLK/4

CCLK/2

CCLK

pclk

WDT

rtclk = 1Hz

usbclk

(48 MHz)

cclk

USB PLL

USB PLL enable

main PLL enable

32 kHz

APB peripherals