STMicroelectronics Low voltage full bridge reference design board featuring L6393 advanced high-voltage gate driver EVAL EVAL6393FB 数据表

产品代码
EVAL6393FB
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页码 9
EVAL6393FB
Board description
Doc ID 023821 Rev 1
3/9
Table 2.
Jumper and connector description
Name
Type
Function
J1
Control signal connector 
Optional control signal and external V
CC
 connector
J2
Power output 
Load connector
J3
Power supply 
BUS power supply connector
JP1
Configuration jumper 
To pull-up SD and/or BRAKE signal to V
CC
 /3
JP2
Configuration jumper 
To pull-up SD and/or BRAKE signal to CPOUT
JP3
Configuration jumper 
To connect the on-board generated V
CC
 to the supply pins 
of the drivers
Table 3.
Control signal connector pinout (J1)
Pin
Type
Description
1
Power supply
Driver power supply V
CC
, open JP3 to provide externally 
generated V
CC
 
2
Power supply
GND
3
Digital input
Driver SD signal
4
Digital input
Driver BRAKE signal 
5
Analog PWM input
V
ctrl
 signal; used to change current limit threshold
6
Digital input
DIR signal; sets current direction
Table 4.
Current peak detection settings
Pin
Type
Description
TR1
Variable resistor
Used to adjust constant off-time duration after overcurrent 
detection
TR2
Variable resistor
Used to adjust overcurrent detection threshold I
pk
I
pk
 = V(CP-)/[R10//R11//R12//R13]
Table 5.
Control scheme configuration
Description
Jumper configuration
Constant off-time peak current control with slow-
decay
JP1 closed on !SD and JP2 closed on !BRAKE
Constant off-time peak current control with fast- 
decay
JP1 closed on !SD and JP2 closed on !SD
PWM voltage control with slow-decay overcurrent 
protection
JP1 open, JP2 closed on !BRAKE and !SD 
externally provided through J1
PWM voltage control with fast-decay overcurrent 
protection
JP1 open, JP2 closed on !SD and !BRAKE 
externally provided through J1