Infineon Technologies Step-Down DC/DC Controller TLE 6389 DEMOBOARD TLE 6389-2 GV50 DEMOBOARD TLE 6389-2 GV50 数据表
产品代码
DEMOBOARD TLE 6389-2 GV50
TLE 6389
Datasheet Rev. 2.1
35
2007-08-13
7.11
Components recommendation - overview
7.12
Layout recommendation
The most sensitive points for Buck converters - when considering the layout - are the
nodes at the input, output and the gate of the PMOS transistor and the feedback path.
nodes at the input, output and the gate of the PMOS transistor and the feedback path.
For proper operation and to avoid stray inductance paths the external catch diode, the
Buck inductance and the input capacitor C
Buck inductance and the input capacitor C
IN1
have to be connected as close as possible to
the PMOS device. Also the GDRV path from the controller to the MosFet has to be as short
as possible. Best suitable for the connection of the cathode of the catch diode and one
terminal of the inductance would be a small plain located next to the drain of the PMOS.
as possible. Best suitable for the connection of the cathode of the catch diode and one
terminal of the inductance would be a small plain located next to the drain of the PMOS.
The GND connection of the catch diode must be also as short as possible. In general the
GND level should be implemented as surface area over the whole PCB as second layer,
if necessary as third layer. The feedback path has to be well grounded also, a ceramic
capacitance might help in addition to the output cap to avoid spikes.
GND level should be implemented as surface area over the whole PCB as second layer,
if necessary as third layer. The feedback path has to be well grounded also, a ceramic
capacitance might help in addition to the output cap to avoid spikes.
To obtain the optimum filter capability of the input pi-filter it has to be located also as
close as possible to the input. To filter the supply input of the device (VS) the ceramic cap
should be connected directly to the pin.
close as possible to the input. To filter the supply input of the device (VS) the ceramic cap
should be connected directly to the pin.
As a guideline an EMC optimized application board / layout is available.
Device
Type
Supplier
Remark
C
IN1
Electrolytic /Foil type
various
100
µ
F, 60V
C
IN2
Ceramic
various
220nF, 60V
L1
B82464-A4473
EPCOS
47
µ
H, 1.6A, 145m
Ω
B82479-A1473-M
EPCOS
47
µ
H, 3.5A, 47m
Ω
DO3340P-473
Coilcraft
47
µ
H, 3.8A, 110m
Ω
DO5022P-683
Coilcraft
68
µ
H, 3.5A, 130m
Ω
DS5022P-473
Coilcraft
47
µ
H, 4.0A, 97m
Ω
M1
BSO 613SPV
Infineon
60V, 3.44A, 130m
Ω
, NL
BSP 613P
Infineon
60V, 2.9A, 130m
Ω
, NL
SPD09P06PL
Infineon
60V, 9A, 250m
Ω
, LL
C
BDS
Ceramic
various
220nF, 16V
D1
MBRD360
Motorola
Schottky, 60V, 3A
MBRD340
Motorola
Schottky, 40V, 3A
SS34
various
Schottky, 40V, 3A
C
OUT
B45197-A2107
EPCOS
Low ESR Tantalum, 100
µ
F, 10V
C
COMP
Ceramic
various