Renesas YR0K77210S003BE 数据表
RSK+RZA1H
5. User Circuitry
R20UT2587EG0200 Rev. 2.00
Page 21 of 58
Mar 21, 2014
5.10.1
QSPI Modes of Operation
There are several modes of operation of the QSPI memory in conjunction with the serial memory controller in
the RZ/A1H MCU. On the RSK+ board, there are two QSPI memory devices, attached to ports 0 and 1, of the
Multi I/O SPI controller’s channel 0. Channel 1 is used for other functions.
Figure 5.5.1: RZ/A1H SPI multi I/O controller.
Each QSPI memory device can support one, two or four simultaneous serial lines of I/O. Furthermore, the
controller allows each channel’s ports to work in parallel, providing up to eight simultaneous serial lines of I/O
in dual QSPI mode. During the QSPI boot mode Port 0 is used and is accessed using only the clock,
SPBMO0 and SPBMI0 signals (Single bit Single channel).
Figure 5.5.2: Single bit single channel operation mode.