Intel C2530 FH8065401488915 数据表
产品代码
FH8065401488915
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
287
Volume 2—SMBus 2.0 Unit 1 - Host—C2000 Product Family
Signal Descriptions
15.1
Signal Descriptions
The signal description table has the following headings:
• Signal Name: The name of the signal/pin
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
The optional SMBus 2.0 signals, SMBALERT# and SMBSUS#, are not supported on this
controller interface.
15.2
Features
• Operates as an SMBus master or target
• Supports ARP in master or slave mode
• PEC is enabled for SMBus transactions
• Compatible with certain I
• Supports ARP in master or slave mode
• PEC is enabled for SMBus transactions
• Compatible with certain I
2
C master (all commands except read-then-write) and
slave (only MTx-to-SRx) modes
• Status and errors are communicated by polling or interrupts
• Supports INTx or MSI
• Supports INTx or MSI
Table 15-2. Signal Names
Signal Name
Direction
Type
Description
I/OD
SMBus Clock (SMBCLK)
This signal is muxed with GPIOS_12
This signal is muxed with GPIOS_12
and is used by other functions.
I/OD
SMBus Data (SMBDAT)
This signal is muxed with GPIOS_11 and is used by other functions.
This signal is muxed with GPIOS_11 and is used by other functions.