Intel C2338 FH8065501516761 数据表
产品代码
FH8065501516761
Volume 3—Signal Names and Descriptions—C2000 Product Family
SATA3 Signals
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 3 of 3
September 2014
590
Order Number: 330061-002US
31.8
SATA3 Signals
Table 31-10. SATA3 Signals (Sheet 1 of 2)
Signal Name
I/O
Type
I/O Buffer
Type
Ball
Count
Internal
Resistor
PU/PD
External
Resistor
PU/PD
Power
Rail
Description
SATA3_GP0/GPIOS_17
I
CMOS_V3P3
1
20K, PU
V3P3S
Serial ATA 0 General Purpose:
This is an input pin which can
be configured as an interlock
switch or as a general purpose
I/O depending on the
platform. When used as an
interlock switch status
indication, this signal is driven
to 0 to indicate that the switch
is closed and to 1 to indicate
that the switch is open. If the
SATA3_GP0 interface is not
used, the signals can be used
as GPIO Port 17.
SATA3_LEDN/GPIOS_18
O, OD
CMOS_V3P3_
OD
1
EXT PU
V3P3S
Serial ATA LED: This is an
open-collector output pin
driven during SATA command
activity. It is to be connected
to external circuitry that can
provide the current to drive a
platform LED. When active,
the LED is on. When tri-
stated, the LED is off. An
external pull-up resistor is
required. If SATA3_LEDN
interface is not used, the
signals can be used as GPIO
Port 18.
SATA3_TXP[1:0]
O
LV DIFF
2
V1P0S
Serial ATA Ports 1:0
Differential Transmit Pairs:
Ports 1:0 support up to
6 Gb/s.
SATA3_TXN[1:0]
O
LV DIFF
2
V1P0S
Serial ATA Ports 1:0
Differential Transmit Pairs:
Ports 1:0 support up to
6 Gb/s.
SATA3_RXP[1:0]
I
LV DIFF
2
V1P0S
Serial ATA Ports 1:0
Differential Receive Pairs:
Ports 1:0 support up to
6 Gb/s.
SATA3_RXN[1:0]
I
LV DIFF
2
V1P0S
Serial ATA Ports 1:0
Differential Receive Pairs:
Ports 1:0 support up to
6 Gb/s.
SATA3_REFCLKP
I
LV DIFF
1
V1P0S
Serial ATA 100 MHz
Differential Clock: Reference
clock 100 MHz differential
signal from a clock chip. If
unused, tie to ground through
a 10 kΩ resistor.