Intel C2550 FH8065401488912 数据表
产品代码
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
173
Volume 2—System Address Maps—C2000 Product Family
Physical Address Space Map
10.1.1.1
Low MMIO
The Low MMIO range is shown in
.
Note:
The 16MB BIOS Decode MMIO space under the Boot Vector range is enabled by default
via the BDE (BIOS Decode Enable (BDE) register is located in the configuration space at
bus 0, device 31 (decimal), function 0, at offset D8h). The BIOS Decode MMIO space
allows MMIO accesses to be sent to the LPC bridge or the SPI controller which is
determined by the boot selection strap pin FLEX_CLK_SE0.
Figure 10-2. Physical Address Space - Low MMIO
Low DRAM
DOS DRAM
High MMIO
Low MMIO
4 GB
64 GB
1 MB
Physical Address
Space
High DRAM
BMBOUND
Boot Vector
Abort Page
MMIO with Fixed
Memory Addresses
MMIO with variable
Memory Addresses
using Base Address
Register (BAR)
For details, refer to
tables in this chapter
256-MB ECAM location
determined by BECREG
PCI ECAM