Intel C2550 FH8065401488912 数据表
产品代码
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
89
Volume 2—System Agent and Root Complex—C2000 Product Family
Global Error Reporting
4.7.5
MCERR/IERR Signaling
• Retirement watchdog time-out from the core.
• Internal error detected by the SoC power management circuitry.
• Internal error detected by the SoC power management circuitry.
Note:
4.7.6
PCI Express INTx and MSI
PCIe* INTx and MSI are supported through the PCIe standard error reporting. The SoC
forwards the MSI generated from the downstream PCIe devices to the CPU. Also, PCIe
Root Ports and the Root Complex Event Collector (RCEC) in the SoC generates
INTx/MSI interrupts for error reporting if enabled. Refer to the PCI Express Base
Specification, Revision 2.1 for more details on the PCIe standard and the Advanced
Error Reporting (AER) capability.
Figure 4-6. MCERR and IERR Handling
SoC
L2 Cache
Bus Interface
Core 0
MC
E
E
RR
IE
R
R
MC
ER
R
ER
R
OR
IE
RR
Core 1
L2 Cache
Bus Interface
Core 0
MCER
R
IER
R
R
MC
E
E
RR
OR
IE
R
R
Core 1
L2 Cache
Bus Interface
Core 0
MCER
R
IER
R
R
MC
E
E
RR
OR
IE
R
R
Core 1
L2 Cache
Bus Interface
Core 0
MCER
R
IER
R
R
MC
E
E
RR
OR
IE
R
R
Core 1
from Power
Management
To external
Management
Controller
MCERR_B
IERR_B
from Uncore
IERR
MCERR