Intel E3815 FH8065301567411 数据表
产品代码
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
396
Datasheet
13.6.45
TTE_SWT—Offset BFh
Thermal trip event for software initiated thermal event
Access Method
Default: 00000000h
15:12
0h
RW
RESERVED_5:
Reserved
11
0h
RW
MSI_ENABLE:
MSI Enable
10
0h
RW
SMI_ENABLE:
SMI Enable
9
0h
RW
SCI_ENABLE:
SCI Enable
8
0h
RW
SATA_THROTTLE_ENABLE:
SATA Throttle Enable
7:5
0h
RO
RESERVED_10:
Reserved
4
0h
RW
GFX_VNN_THROT:
Graphics Vnn Throttle (Reserved for VLV)
3
0h
RW
GFX_TM2_ENABLE:
GFX TM2 Enable....
2
0h
RW
GFX_TM1_ENABLE:
GFX TM1 Enable....
1
0h
RW
BW_THROT_ENABLE:
BW throttle Enable
0
0h
RW
DDR_REFRESH_ENABLE:
DDR 2X refresh Enable
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RES
E
RVE
D
_1
SLM1_PROCHO
T
_ENABLE
SLM0_PROCHO
T
_ENABLE
XXPROCHO
T
_ENABLE
RES
E
RVE
D
_5
TQ
_
PO
LL
iU
nitTM1
MS
I_
E
N
AB
LE
SMI_ENABLE
SC
I_ENABLE
SA
TA
_T
HR
O
TT
LE_E
N
A
B
LE
VSP_TM1_ENABLE
VEC_TM1_ENABLE
VE
D_TM1_ENABLE
G
FX
_
VNN_TH
RO
T
GFX_TM2_ENABLE
GFX_TM1_ENABLE
BW_
T
HRO
T
_ENABLE
DDR_REFRE
SH_ENABLE