Texas Instruments TMS320DM644x 用户手册
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3.7
MMC/SD Mode Multiple-Block Write Operation Using EDMA
3.8
MMC/SD Mode Multiple-Block Read Operation Using CPU
Procedures for Common Operations
To perform a multiple-block write, the same block length needs to be set in both the MMC/SD controller
and the card. The procedure for this operation is:
and the card. The procedure for this operation is:
1. Write the card’s relative address to the MMC argument registers (MMCARGH and MMCARGL). Load
the high part of the address to MMCARGH and the low part of the address to MMCARGL.
2. Read card CSD to determine the card's maximum block length.
3. Use the MMC command register (MMCCMD) to send the SET_BLOCKLEN command (if the block
3. Use the MMC command register (MMCCMD) to send the SET_BLOCKLEN command (if the block
length is different than the length used in the previous operation). The block length must be a multiple
of 512 bytes and less then the maximum block length specified in the CSD.
of 512 bytes and less then the maximum block length specified in the CSD.
4. Reset the FIFO (FIFORST bit in MMCFIFOCTL).
5. Set the FIFO direction to transmit (FIFODIR bit in MMCFIFOCTL).
6. Set the FIFO threshold (FIFOLEV bit in MMCFIFOCTL).
7. Set the access width (ACCWD bits in MMCFIFOCTL).
8. Set up DMA (DMA size needs to be greater than or equal to FIFOLEV setting).
9. Use MMCCMD to send the WRITE_MULTI_BLOCK command to the card (set DMATRIG bit in
5. Set the FIFO direction to transmit (FIFODIR bit in MMCFIFOCTL).
6. Set the FIFO threshold (FIFOLEV bit in MMCFIFOCTL).
7. Set the access width (ACCWD bits in MMCFIFOCTL).
8. Set up DMA (DMA size needs to be greater than or equal to FIFOLEV setting).
9. Use MMCCMD to send the WRITE_MULTI_BLOCK command to the card (set DMATRIG bit in
MMCCMD to trigger first DMA).
10. Wait for DMA sequence to complete or the DATADNE flag in the MMC status register 0 (MMCST0) is
set.
11. Use MMCST0 to check for errors.
12. Use MMCCMD to send the STOP_TRANSMISSION command.
12. Use MMCCMD to send the STOP_TRANSMISSION command.
To perform a multiple-block read, the same block length needs to be set in both the MMC/SD controller
and the card.
and the card.
Note: The procedure in this section uses a STOP_TRANSMISSION command to end the block transfer.
This assumes that the value in the MMC number of blocks counter register (MMCNBLK) is 0. A
multiple-block operation terminates itself if you load MMCNBLK with the exact number of blocks you want
transferred.
This assumes that the value in the MMC number of blocks counter register (MMCNBLK) is 0. A
multiple-block operation terminates itself if you load MMCNBLK with the exact number of blocks you want
transferred.
The procedure for this operation is:
1. Write the card’s relative address to the MMC argument registers (MMCARGH and MMCARGL). Load
the high part of the address to MMCARGH and the low part of the address to MMCARGL.
2. Read card CSD to determine the card's maximum block length.
3. Use the MMC command register (MMCCMD) to send the SET_BLOCKLEN command (if the block
3. Use the MMC command register (MMCCMD) to send the SET_BLOCKLEN command (if the block
length is different than the length used in the previous operation). The block length must be a multiple
of 512 bytes and less then the maximum block length specified in the CSD.
of 512 bytes and less then the maximum block length specified in the CSD.
4. Reset the FIFO (FIFORST bit in MMCFIFOCTL).
5. Set the FIFO direction to receive (FIFODIR bit in MMCFIFOCTL).
6. Set FIFO threshold (FIFOLEV bit in MMCFIFOCTL).
7. Set the access width (ACCWD bits in MMCFIFOCTL).
8. Enable the MMC interrupt.
9. Enable DRRDYINT interrupt.
10. Use MMCCMD to send the READ_MULT_BLOCKS command.
11. Wait for MMC interrupt.
12. Use the MMC status register 0 (MMCST0) to check for errors and to determine the status of the FIFO.
5. Set the FIFO direction to receive (FIFODIR bit in MMCFIFOCTL).
6. Set FIFO threshold (FIFOLEV bit in MMCFIFOCTL).
7. Set the access width (ACCWD bits in MMCFIFOCTL).
8. Enable the MMC interrupt.
9. Enable DRRDYINT interrupt.
10. Use MMCCMD to send the READ_MULT_BLOCKS command.
11. Wait for MMC interrupt.
12. Use the MMC status register 0 (MMCST0) to check for errors and to determine the status of the FIFO.
If FIFO is not empty and more bytes are to be read, go to step 13. If the all of the data has been read,
go to step 14.
go to step 14.
13. Read n bytes (depends on setting of FIFOLEV in MMCFIFOCTL: 0 = 16 bytes, 1 = 32 bytes) of data
from the MMC data receive register (MMCDRR) and go to step 10.
14. Use MMCCMD to send the STOP_TRANSMISSION command.
The sequence of events in this operation is shown in
.
38
Multimedia Card (MMC)/Secure Digital (SD) Card Controller
SPRUE30B – September 2006