Renesas M32R-FPU 用户手册
3
3-37
M32R-FPU Software Manual (Rev.1.01)
INSTRUCTIONS
3.2 Instruction description
[Supplemental Operation Description]
The following shows the values of Rsrc1 and Rsrc2 and the operation results when DN = 0 and
DN = 1.
DN = 0
Rsrc2
add
UIPL
QNaN
QNaN
SNaN
QNaN
SNaN
+0
+0
+0
(Note)
(Note)
+Infinity
+Infinity
IVLD
IVLD
IVLD
-Infinity
-Infinity
-Infinity
-Infinity
-0
-0
+Infinity
-Infinity
Denormalized
Number
Denormalized
Number
Normalized
Number
Normalized
Number
-0
Rsrc1
Rsrc2
add
QNaN
QNaN
SNaN
QNaN
SNaN
+0
(Note)
(Note)
+Infinity
+Infinity
IVLD
IVLD
IVLD
-Infinity
-Infinity
-Infinity
-Infinity
-0
+Infinity
-Infinity
Rsrc1
Normalized Number
Normalized
Number
Normalized
Number
Normalized
Number
+0, +
-0, -
-0, -
Denormalized
Number
+0, +
Denormalized
Number
Denormalized
Number
Denormalized
Number
DN = 1
IVLD: Invalid Operation Exception
UIPL: Unimplemented Exception
NaN: Not a Number
SNaN: Signaling NaN
QNaN: Quiet NaN
Note: The rounding mode is “-0” when rounding toward “-Infinity”, and “+0” when rounding
toward any other direction.
FADD
FADD
floating point Instructions
Floating-point addd
[M32R-FPU Extended Instruction]