Renesas R61509V 用户手册
R61509V
Target
Spec
Rev. 0.11 April 25, 2008, page 10 of 181
Block Diagram
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VCC
VDD
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C13P/C1
3
M
G1-G432
VGH
VGL
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VMON
VGS
VCI
VCI1
C1
1P
/C1
1
M
C12P/C1
2
M
DDVDH
C21P/C21
M
C22P/C22
M
GND
AGND
V63-0
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VREG1OUT
VCOMH
VCOML
VCOMR
VCOM
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CSX
RS
WR_SCL
RDX
SDI
SDO
DB17-0
VSYNCX
HSYNCX
DOTCLK
ENABLE
RESETX
FMARK
IOVCC
18
18
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18
18
18
18
VPP1,
VPP3A,3B
VPP3A,3B
IM2-1, IM0_ID
VCL
PROTECT
Index
Register (IR)
Register (IR)
Control
Register
(CR)
Register
(CR)
Address
Counter
Counter
Graphic RAM
(GRAM)
233,280byte
(GRAM)
233,280byte
Write data
latch
latch
Read data
latch
latch
System
interface
interface
18 bit
16 bit
9 bit
8 bit
Serial
16 bit
9 bit
8 bit
Serial
External
display
interface
display
interface
Timing
generator
generator
Oscillator
Internal reference
voltage generating
circuit
voltage generating
circuit
Internal logic
power supply
circuit
power supply
circuit
LCD drive level generating circuit
Latch circuit
Latch circuit
M alternation
Latch Circuit
Source line drive circuit
Grayscale voltage
generating circuit
Gamma
correction circuit
Gate line drive circuit
Sc
an data generating circuit
NVM
Figure 1