Daewoo Electronics DVD Player DVG - 5300N 用户手册
PIN FUNCTION DESCRIPTION
PIN
PIN NAME
DESCRIPTION
CLK
Clock
The system clock input. All other inputs are referenced to the SDRAM on the
rising edge of CLK.
rising edge of CLK.
CKE
Clock Enable
Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh.
of the states among power down, suspend or self refresh.
CS
Chip Select
Command input enable or mask except CLK, CKE and DQM
BA
Bank Address
Select either one of banks during both RAS and CAS activity.
A0 ~ A10
Address
Row Address : RA0 ~ RA10, Column Address : CA0 ~ CA7
Auto-precharge flag : A10
Auto-precharge flag : A10
RAS, CAS, WE
Row Address Strobe,
Column Address Strobe,
Write Enable
Column Address Strobe,
Write Enable
RAS, CAS and WE define the operation.
Refer function truth table for details
Refer function truth table for details
LDQM, UDQM
Data Input/Output Mask
DQM control output buffer in read mode and mask input data in write mode
DQ0 ~ DQ15
Data Input/Output
Multiplexed data input / output pin
V
DD
/V
SS
Power Supply/Ground
Power supply for internal circuit and input buffer
V
DDQ
/V
SSQ
Data Output Power/Ground
Power supply for DQ
NC
No Connection
No connection
Note:
We have rights to improve our design plan before we inform our customers.
4-15