Silicon Image Drive SSD-P08G(I)-3521 数据表

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页码 109
E
LECTRICAL
 S
PECIFICATION
SSD-P
XXX
(I)-3521 D
ATA
 S
HEET
S
ILICON
S
YSTEMS
 P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3521P-02DSR
P
AGE
 22
F
EBRUARY
 2, 2009
True IDE Multiword DMA Read/Write Access Timing
This function does not apply to SiliconDrives that have DMA disabled.
Figure 7:  True IDE Multiword DMA Read/Write Access Timing
Table 17:  True IDE Multiword DMA Read/Write Access Timing
Symbol
Parameter
Minimum
Maximum
Units
t
RWC
Cycle Time (mode 2)
100
-
ns
t
RWPW
DIOR/DIOW Pulse Width
65
-
ns
t
RDA
DIOR Data Access
-
50
ns
t
RWSU
DIOR/DIOW Data Setup Time
15
-
ns
t
WH
DIOW Data Hold Time
5
-
ns
t
RH
DIOR Data Hold Time
5
-
ns
t
DMRW
DMACK to DIOR/DIOW Setup Time
0
-
ns
t
RWDH
DIOR/DIOW to DMACK Hold Time
5
-
ns
t
RWN
DIOR/DIOW negated Pulse Width
25
-
ns
t
RWD
DIOR/DIOW to DMARQ Delay 
-
35
ns
t
CSRW
CS(1:0) valid to DIOR/DIOW
10
-
ns
t
CSH
CS(1:0) Hold Time
10
-
ns