Silicon Image Drive SSD-P08G(I)-3521 数据表
A
TTRIBUTE
M
EMORY
D
ESCRIPTION
AND
O
PERATION
SSD-P
XXX
(I)-3521 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3521P-02DSR
P
AGE
38
F
EBRUARY
2, 2009
C
ONFIGURATION
AND
S
TATUS
R
EGISTER
(202
H
)
The Configuration and Status Register (CSR) informs the host of any status
changes with regard to power-down.
changes with regard to power-down.
Table 23: Configuration and Status Register (202h)
Operation
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Read
Changed SigChg IOis8
0
0
PwrDn
Int
0
Write
Changed SigChg IOis8
0
0
PwrDn
Int
0
Default
Value
Value
0
0
0
0
0
0
0
0
Bit(s)
Description
Changed
Indicates that either CREADY (D5) or CWPort (D4) of the Pin
Replacement register is set. Additionally, this bit changes state
as the Powerdown (D2) bit changes.
Replacement register is set. Additionally, this bit changes state
as the Powerdown (D2) bit changes.
SigChg
Outputs the inverse state of the Changed bit to the hardware
interface signal STSCHG# at the card interface.
interface signal STSCHG# at the card interface.
Iois8
Informs the host of the valid data bus width for the operations in
progress:
progress:
• 0 = 16-bit data transfer
• 1 = 8-bit data transfer
• 1 = 8-bit data transfer
PwrDwn
Indicates the state of the Card, which is either operating -0 or
powerdown mode 1. During powerdown mode, no commands
are accepted. Additionally, the host may not initiate a
powerdown request when the card is busy via the Status
register or the Hardware RDY/BSY pin.
powerdown mode 1. During powerdown mode, no commands
are accepted. Additionally, the host may not initiate a
powerdown request when the card is busy via the Status
register or the Hardware RDY/BSY pin.
Int
Indicates the inverse of the IREQ# status signal.