Renesas Laptop 6NM 用户手册
Rev.1.10 Jul 01, 2005 page 211 of 318
REJ09B0124-0110
REJ09B0124-0110
M16C/6N Group (M16C/6NK, M16C/6NM)
18. CAN Module
Under development
This document is under development and its contents are subject to change.
Figure 18.10 C0CONR and C1CONR Registers
b7
b6
b5
b4
b3
b2
b1
b0
0 : One time sampling
1 : Three times sampling
1 : Three times sampling
0 0 0 0 : Divide-by-1 of fCAN
0 0 0 1 : Divide-by-2 of fCAN
0 0 1 0 : Divide-by-3 of fCAN
0 0 0 1 : Divide-by-2 of fCAN
0 0 1 0 : Divide-by-3 of fCAN
1 1 1 0 : Divide-by-15 of fCAN
1 1 1 1 : Divide-by-16 of fCAN
1 1 1 1 : Divide-by-16 of fCAN
(1)
.....
0 0 0 : 1Tq
0 0 1 : 2Tq
0 1 0 : 2Tq
0 0 1 : 2Tq
0 1 0 : 2Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
1 1 1 : 8Tq
(b15) (b8)
b7
b6
b5
b4
b3
b2
b1
b0
RW
RW
RW
RW
Phase Buffer
Segment 1
Control Bits
Segment 1
Control Bits
Phase Buffer
Segment 2
Control Bits
Segment 2
Control Bits
Resynchronization
Jump Width
Control Bits
Jump Width
Control Bits
.....
CANi Configuration Register (i = 0, 1)
b3 b2 b1 b0
b7 b6 b5
b2 b1b0
b5 b4 b3
b7 b6
NOTE:
1. fCAN serves for the CAN clock. The period is decided by configuration of the CCLKi bit (i = 0 to 2, 4 to 6) in the CCLKR register.
Sampling Control
Bit
Bit
Prescaler Division
Ratio Select Bits
Ratio Select Bits
Propagation Time
Segment Control
Bits
Segment Control
Bits
RW
RW
RW
.....
.....
0 0 0 : Do not set a value
0 0 1 : 2Tq
0 1 0 : 3Tq
0 0 1 : 2Tq
0 1 0 : 3Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
1 1 1 : 8Tq
0 0 0 : Do not set a value
0 0 1 : 2Tq
0 1 0 : 3Tq
0 0 1 : 2Tq
0 1 0 : 3Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
1 1 1 : 8Tq
0 0 : 1Tq
0 1 : 2Tq
1 0 : 3Tq
1 1 : 4Tq
0 1 : 2Tq
1 0 : 3Tq
1 1 : 4Tq
BRP
SAM
PTS
PBS1
PBS2
SJW
C0CONR
C1CONR
C1CONR
Indeterminate
Indeterminate
Indeterminate
021Ah
023Ah
023Ah
Symbol
Address
After Reset
C0CONR
C1CONR
C1CONR
Indeterminate
Indeterminate
Indeterminate
021Bh
023Bh
023Bh
Symbol
Address
After Reset
RW
Function
Bit Symbol
Bit Name
Function
Bit Symbol
Bit Name