Transcend 1GB DDR2-800 TS128MSQ64V8W 用户手册
产品代码
TS128MSQ64V8W
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200PIN DDR2 800 SO-DIMM
1GB With 64Mx16 CL6
Transcend Information Inc.
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Description
The TS128MSQ64V8W is a 128M x 64bits DDR2-800
SO-DIMM. The TS128MSQ64V8W consists of 8pcs
64Mx16bits DDR2 SDRAMs in 84 ball FBGA packages
and a 2048 bits serial EEPROM on a 200-pin printed
circuit board. The TS128MSQ64V8W is a Dual In-Line
Memory Module and is intended for mounting into 200-pin
edge connector sockets.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges of DQS. Range of operation frequencies,
programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
Features
• RoHS compliant products.
• JEDEC standard 1.8V ± 0.1V Power supply
• VDDQ=1.8V ± 0.1V
• Max clock Freq: 400MHZ; 800Mb/s/Pin.
• Posted CAS
• Programmable CAS Latency: 3, 4, 5, 6
• Programmable Additive Latency :0, 1, 2, 3, 4, 5
• Write Latency (WL) = Read Latency (RL)-1
• Burst Length: 4, 8(Interleave/nibble sequential)
• Programmable sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended
• JEDEC standard 1.8V ± 0.1V Power supply
• VDDQ=1.8V ± 0.1V
• Max clock Freq: 400MHZ; 800Mb/s/Pin.
• Posted CAS
• Programmable CAS Latency: 3, 4, 5, 6
• Programmable Additive Latency :0, 1, 2, 3, 4, 5
• Write Latency (WL) = Read Latency (RL)-1
• Burst Length: 4, 8(Interleave/nibble sequential)
• Programmable sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended
data-strobe is an optional feature)
• Off-Chip Driver (OCD) Impedance Adjustment
• MRS cycle with address key programs.
• On Die Termination
• Serial presence detect with EEPROM
• MRS cycle with address key programs.
• On Die Termination
• Serial presence detect with EEPROM
Placement
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