Intel Core 2 Quad Q9505 AT80580PJ0736MG 用户手册

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Datasheet

temperature. The Intel Thermal Monitor uses two modes to activate the TCC: automatic 

mode and on-demand mode. If both modes are activated, automatic mode takes 

precedence. 

There are two automatic modes called Intel Thermal Monitor 1 (TM1) and Intel Thermal 

Monitor 2 (TM2). These modes are selected by writing values to the MSRs of the 

processor. After automatic mode is enabled, the TCC will activate only when the 

internal die temperature reaches the maximum allowed value for operation. 

When TM1 is enabled and a high temperature situation exists, the clocks will be 

modulated by alternately turning the clocks off and on at a 50% duty cycle. Cycle times 

are processor speed-dependent and will decrease linearly as processor core frequencies 

increase. Once the temperature has returned to a non-critical level, modulation ceases 

and TCC goes inactive. A small amount of hysteresis has been included to prevent rapid 

active/inactive transitions of the TCC when the processor temperature is near the trip 

point. The duty cycle is factory configured and cannot be modified. Also, automatic 

mode does not require any additional hardware, software drivers, or interrupt handling 

routines. Processor performance will be decreased by the same amount as the duty 

cycle when the TCC is active. 

When TM2 is enabled and a high temperature situation exists, the processor will 

perform an Enhanced Intel SpeedStep Technology transition to the LFM. When the 

processor temperature drops below the critical level, the processor will make an 

Enhanced Intel SpeedStep Technology transition to the last requested operating point. 

Intel recommends TM1 and TM2 be enabled on the processors.

TM1 and TM2 can co-exist within the processor. If both TM1 and TM2 bits are enabled in 

the auto-throttle MSR, TM2 takes precedence over TM1. However, if Force TM1 over 

TM2 is enabled in MSRs via BIOS and TM2 is not sufficient to cool the processor below 

the maximum operating temperature, then TM1 will also activate to help cool down the 

processor. 

If a processor load-based Enhanced Intel SpeedStep Technology transition (through 

MSR write) is initiated when a TM2 period is active, there are two possible results:

1. If the processor load-based Enhanced Intel SpeedStep Technology transition target 

frequency is higher than the TM2 transition-based target frequency, the processor 

load-based transition will be deferred until the TM2 event has been completed.

2. If the processor load-based Enhanced Intel SpeedStep Technology transition target 

frequency is lower than the TM2 transition-based target frequency, the processor 

will transition to the processor load-based Enhanced Intel SpeedStep Technology 

target frequency point.

The TCC may also be activated via on-demand mode. If bit 4 of the ACPI Intel Thermal 

Monitor control register is written to a 1, the TCC will be activated immediately 

independent of the processor temperature. When using on-demand mode to activate 

the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the 

same ACPI Intel Thermal Monitor control register. In automatic mode, the duty cycle is 

fixed at 50% on, 50% off, however in on-demand mode, the duty cycle can be 

programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. 

On-demand mode may be used at the same time automatic mode is enabled, however, 

if the system tries to enable the TCC via on-demand mode at the same time automatic 

mode is enabled and a high temperature condition exists, automatic mode will take 

precedence. 

An external signal, PROCHOT# (processor hot) is asserted when the processor detects 

that its temperature is above the thermal trip point. Bus snooping and interrupt 

latching are also active while the TCC is active.