Motorola MC68HC908MR16 用户手册
System Integration Module (SIM)
SIM Registers
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
Advance Information
MOTOROLA
System Integration Module (SIM)
105
SBSW — SIM Break Stop/Wait Bit
This status bit is useful in applications requiring a return to wait mode
after exiting from a break interrupt. Clear SBSW by writing a logic 0 to
it. Reset clears SBSW.
after exiting from a break interrupt. Clear SBSW by writing a logic 0 to
it. Reset clears SBSW.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this. Writing 0 to the SBSW bit
clears it.
modify the return address on the stack by subtracting one from it. The
following code is an example of this. Writing 0 to the SBSW bit
clears it.
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
EQU
5
LOBYTE
EQU
6
;
If not SBSW, do RTI
BRCLR
SBSW,SBSR, RETURN
;
;
See if wait mode was exited by break.
TST
LOBYTE,SP
;If RETURNLO is not zero,
BNE
DOLO
;then just decrement low byte.
DEC
HIBYTE,SP
;Else deal with high byte, too.
DOLO
DEC
LOBYTE,SP
;Point to WAIT opcode.
RETURN
PULH
RTI
;Restore H register.