Motorola MC68HC908MR16 用户手册
Advance Information
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
202
Timer Interface A (TIMA)
MOTOROLA
Timer Interface A (TIMA)
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$000E
TIMA Status/Control Register
(TASC)
Read:
TOF
TOIE
TSTOP
0
0
PS2
PS1
PS0
Write:
0
TRST
R
Reset:
0
0
1
0
0
0
0
0
$000F
TIMA Counter Register High
(TACNTH)
Read: Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
R
R
R
R
R
R
R
R
Reset:
0
0
0
0
0
0
0
0
$0010
TIMA Counter Register Low
(TACNTL)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
R
R
R
R
R
R
R
R
Reset:
0
0
0
0
0
0
0
0
$0011
TIMA Counter Modulo
Register High (TAMODH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$0012
TIMA Counter Modulo
Register Low (TAMODL)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$0013
TIMA Channel 0 Status/Control
Register (TASC0)
Read: CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0 CH0MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$0014
TIMA Channel 0 Register High
(TACH0H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$0015
TIMA Channel 0 Register Low
(TACH0L)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
$0016
TIMA Channel 1 Status/Control
Register (TASC1)
Read: CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1 CH1MAX
Write:
0
R
Reset:
0
0
0
0
0
0
0
0
R
= Reserved
Figure 11-2. TIM I/O Register Summary