用户手册目录CY7C68033/CY7C68034 Silicon Features1Default NAND Firmware Features2Overview2Applications2Functional Overview3USB Signaling Speed38051 Microprocessor38051 Clock Frequency3Special Function Registers3I2C Bus3Buses4Enumeration4Normal Operation Mode5Manufacturing Mode5Default Silicon ID Values5ReNumeration™5Bus-powered Applications5Interrupt System5INT2 Interrupt Request and Enable Registers5USB-Interrupt Autovectors5FIFO/GPIF Interrupt (INT4)6Reset and Wakeup7Reset Pin7Wakeup Pins8Program/Data RAM8Internal ROM/RAM Size8Internal Code Memory8Register Addresses8Endpoint RAM9Size9Organization9Setup Data Buffer9Endpoint Configurations (High-speed Mode)9Default Full-Speed Alternate Settings9Default High-Speed Alternate Settings10External FIFO Interface10Architecture10Master/Slave Control Signals10GPIF and FIFO Clock Rates10GPIF10Three Control OUT Signals11Two Ready IN Signals11Long Transfer Mode11ECC Generation[5]11ECCM = 011ECCM = 111Autopointer Access11I2C Controller11I2C Port Pins11I2C Interface General-Purpose Access11Pin Assignments12Register Summary18Absolute Maximum Ratings24Operating Conditions24DC Characteristics25USB Transceiver25AC Electrical Characteristics25USB Transceiver25Slave FIFO Asynchronous Read26Slave FIFO Asynchronous Write26Slave FIFO Asynchronous Packet End Strobe27Slave FIFO Output Enable27Slave FIFO Address to Flags/Data27Slave FIFO Asynchronous Address28Sequence Diagram28Sequence Diagram of a Single and Burst Asynchronous Read28Sequence Diagram of a Single and Burst Asynchronous Write29Ordering Information30Package Diagram30PCB Layout Recommendations[16]31Quad Flat Package No Leads (QFN) Package Design Notes31Document History Page33文件大小: 1.5 MB页数: 33Language: English打开用户手册