用户手册目录Description3Features3Ordering Information3Key Parameters4Speed Grade4Address Table4Pin Descriptions5Input/Output Functional Descriptions6Pin Assignments8Registering Clock Driver Specifications10Capacitance Values10Input & Output Timing Requirements10On DIMM Thermal Sensor11Connection of Thermal Sensor11Temperature-to-Digital Conversion Performance11Functional Block Diagram122GB, 256Mx72 Module(1Rank of x8)124GB, 512Mx72 Module(2Rank of x8) - page1134GB, 512Mx72 Module(2Rank of x8) - page2144GB, 512Mx72 Module(1Rank of x4) - page1154GB, 512Mx72 Module(1Rank of x4) - page2168GB, 1Gx72 Module(4Rank of x8) - page1178GB, 1Gx72 Module(4Rank of x8) - page2188GB, 1Gx72 Module(4Rank of x8) - page3198GB, 1Gx72 Module(2Rank of x4) - page1208GB, 1Gx72 Module(2Rank of x4) - page2218GB, 1Gx72 Module(2Rank of x4) - page32216GB, 2Gx72 Module(4Rank of x4) - page12316GB, 2Gx72 Module(4Rank of x4) - page22416GB, 2Gx72 Module(4Rank of x4) - page32516GB, 2Gx72 Module(4Rank of x4) - page42616GB, 2Gx72 Module(4Rank of x4) - page527Absolute Maximum Ratings28Absolute Maximum DC Ratings28DRAM Component Operating Temperature Range28AC & DC Operating Conditions29Recommended DC Operating Conditions29AC & DC Input Measurement Levels31AC and DC Input Levels for Single-Ended Command and Address Signals31AC and DC Input Levels for Single-Ended Signals32Vref Tolerances33AC and DC Logic Input Levels for Differential Signals34Differential signal definition34Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)35Single-ended requirements for differential signals36Differential Input Cross Point Voltage38Slew Rate Definitions for Single-Ended Input Signals39Slew Rate Definitions for Differential Input Signals39AC & DC Output Measurement Levels40Single Ended AC and DC Output Levels40Differential AC and DC Output Levels40Single Ended Output Slew Rate41Differential Output Slew Rate42Reference Load for AC Timing and Output Slew Rate43Overshoot and Undershoot Specifications44Address and Control Overshoot and Undershoot Specifications44Clock, Data, Strobe and Mask Overshoot and Undershoot Specifications45Refresh parameters by device density46Standard Speed Bins46DDR3-800 Speed Bins46DDR3-1066 Speed Bins47DDR3-1333 Speed Bins48Speed Bin Table Notes49Environmental Parameters50Pin Capacitance (VDD=1.5V, VDDQ=1.5V)512GB: HMT325R7AFR8A514GB: HMT351R7AFR8A514GB: HMT351R7AFR4A518GB: HMT31GR7AFR8A518GB: HMT31GR7AFR4A5216GB: HMT42GR7AMR4A52IDD and IDDQ Specification Parameters and Test Conditions53IDD Specifications (Tcase: 0 to 95oC)652GB, 256M x 72 R-DIMM: HMT325R7AFR8A654GB, 512M x 72 R-DIMM: HMT351R7AFR8A654GB, 512M x 72 R-DIMM: HMT351R7AFR4A668GB, 1G x 72 R-DIMM: HMT31GR7AFR8A668GB, 1G x 72 R-DIMM: HMT31GR7AFR4A6716GB, 2G x 72 R-DIMM: HMT42GR7AMR4A67Module Dimensions68256Mx72 - HMT325R7AFR8A68512Mx72 - HMT351R7AFR8A69512Mx72 - HMT351R7AFR4A701Gx72 - HMT31GR7AFR8A711Gx72 - HMT31GR7AFR8A - Heat Spreader721Gx72 - HMT31GR7AFR4A731Gx72 - HMT31GR7AFR4A - Heat Spreader742Gx72 - HMT42GR7AMR4A752Gx72 - HMT42GR7AMR4A - Heat Spreader76文件大小： 1011.4 KB页数： 76Language: English打开用户手册
