用户手册目录Trademarks21.1 Introduction91.2 Board Description91.3 What the MCP6H04 Evaluation Board Kit Includes102.1 Introduction112.2 Required Tools112.3 MCP6H04 Evaluation Board Set-Up112.3.1 Top Level Amplifier Circuit Diagram132.3.1.1 Power Supply Block132.3.1.2 MID-SUPPLY REFERENCE BLOCK132.3.1.3 OUTPUT LOAD BLOCK132.3.1.4 INPUT STAGE142.3.1.5 INPUT BUFFER BLOCK142.3.1.6 DIFFERENCE AMPLIFIER152.4 MCP6H04 Evaluation Board Operation152.4.1 Building the Amplifier15Table 2-1: AMPLIFIER COMPONENTS LIST17Table 2-2: JUMPER POSITIONS172.4.2 Testing the Amplifier182.4.2.1 Checking The Test Points182.4.2.2 Board Validation19A.1 Introduction25A.2 Board – Schematic26A.3 Board – Silk and Solder Mask27A.4 Board – Top Metal Layer27A.5 Board – Bottom Metal Layer (bottom View)28Table B-1: Bill of MAterials (BOM)29Table B-2: Bill of Materials – Accessories Bag Parts29Corporate Office30Atlanta30Boston30Chicago30Cleveland30Fax: 216-447-064330Dallas30Detroit30Indianapolis30Toronto30Fax: 852-2401-343130Australia - Sydney30China - Beijing30China - Shanghai30India - Bangalore30Korea - Daegu30Korea - Seoul30Singapore30Taiwan - Taipei30Fax: 43-7242-2244-39330Denmark - Copenhagen30France - Paris30Germany - Munich30Italy - Milan30Spain - Madrid30UK - Wokingham30Worldwide Sales and Service30Worldwide Sales and Service30文件大小： 780.9 KB页数： 30Language: English打开用户手册
数据表目录1.0 Electrical Characteristics31.1 Absolute Maximum Ratings †31.2 Test Circuits5FIGURE 1-1: AC and DC Test Circuit for Most Specifications.52.0 Typical Performance Curves7FIGURE 2-1: Input Offset Voltage.7FIGURE 2-2: Input Offset Voltage Drift.7FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage.7FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage.7FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage.7FIGURE 2-6: Input Offset Voltage vs. Output Voltage.7FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage.8FIGURE 2-8: Input Noise Voltage Density vs. Frequency.8FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage.8FIGURE 2-10: CMRR, PSRR vs. Frequency.8FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature.8FIGURE 2-12: Input Bias, Offset Currents vs. Ambient Temperature.8FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage.9FIGURE 2-14: Quiescent Current vs. Ambient Temperature.9FIGURE 2-15: Quiescent Current vs. Power Supply Voltage.9FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency.9FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage.9FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom.9FIGURE 2-19: Channel-to-Channel Separation vs. Frequency (MCP6H02 only).10FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.10FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.10FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage.10FIGURE 2-23: Output Voltage Swing vs. Frequency.10FIGURE 2-24: Output Voltage Headroom vs. Output Current.10FIGURE 2-25: Output Voltage Headroom vs. Output Current.11FIGURE 2-26: Output Voltage Headroom vs. Output Current.11FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature.11FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature.11FIGURE 2-29: Output Voltage Headroom vs. Ambient Temperature.11FIGURE 2-30: Slew Rate vs. Ambient Temperature.11FIGURE 2-31: Slew Rate vs. Ambient Temperature.12FIGURE 2-32: Small Signal Non-Inverting Pulse Response.12FIGURE 2-33: Small Signal Inverting Pulse Response.12FIGURE 2-34: Large Signal Non-Inverting Pulse Response.12FIGURE 2-35: Large Signal Inverting Pulse Response.12FIGURE 2-36: The MCP6H01/2/4 Shows No Phase Reversal.12FIGURE 2-37: Closed Loop Output Impedance vs. Frequency.13FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS).133.0 Pin Descriptions15TABLE 3-1: Pin Function Table153.1 Analog Outputs153.2 Analog Inputs153.3 Power Supply Pins153.4 Exposed Thermal Pad (EP)154.0 Application Information174.1 Inputs17FIGURE 4-1: Simplified Analog Input ESD Structures.17FIGURE 4-2: Protecting the Analog Inputs.17FIGURE 4-3: Protecting the Analog Inputs.174.2 Rail-to-Rail Output184.3 Capacitive Loads18FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads.18FIGURE 4-5: Recommended RISO Values for Capacitive Loads.184.4 Supply Bypass184.5 Unused Op Amps18FIGURE 4-6: Unused Op Amps.184.6 PCB Surface Leakage19FIGURE 4-7: Example Guard Ring Layout for Inverting Gain.194.7 Application Circuits19FIGURE 4-8: High Side Current Sensing Using Difference Amplifier.19FIGURE 4-9: Two Op Amp Instrumentation Amplifier.20FIGURE 4-10: Photodetector Amplifier.205.0 Design Aids215.1 SPICE Macro Model215.2 FilterLab Software215.3 MAPS (Microchip Advanced Part Selector)215.4 Analog Demonstration and Evaluation Boards215.5 Application Notes216.0 Packaging Information236.1 Package Marking Information23Corporate Office46Atlanta46Boston46Chicago46Cleveland46Fax: 216-447-064346Dallas46Detroit46Indianapolis46Toronto46Fax: 852-2401-343146Australia - Sydney46China - Beijing46China - Shanghai46India - Bangalore46Korea - Daegu46Korea - Seoul46Singapore46Taiwan - Taipei46Fax: 43-7242-2244-39346Denmark - Copenhagen46France - Paris46Germany - Munich46Italy - Milan46Spain - Madrid46UK - Wokingham46Worldwide Sales and Service46文件大小： 1.0 MB页数： 46Language: English打开用户手册
