用户手册目录Preface5Chapter 1. Product Overview9Chapter 2. Installation and Operation11Figure 2-1: MCP3905A Stand-Alone Energy Meter and Microcontroller-Based Energy Meter Using MCP3905A AFE Design.11Figure 2-2: Photograph of Complete, Stand-Alone MCP3905A Energy Meter.12Figure 2-3: MCP3905A/06A Energy Meter Reference Design Block Diagram.14Appendix A. Schematics and Layouts17Appendix B. Bill Of Materials (BOM)21Worldwide Sales and Service24文件大小： 322.8 KB页数： 24Language: English打开用户手册
数据表目录1.0 Electrical Characteristics3FIGURE 1-1: Output Timings for Pulse Outputs and Negative Power Pin.52.0 Typical Performance Curves7FIGURE 2-1: Measurement Error, Gain = 8, PF = 1.7FIGURE 2-2: Measurement Error, Gain = 16, PF = 1.7FIGURE 2-3: Measurement Error, Gain = 32, PF = 1.7FIGURE 2-4: Measurement Error, Gain = 8, PF = 0.5.7FIGURE 2-5: Measurement Error, Gain = 16, PF = 0.5.7FIGURE 2-6: Measurement Error, Gain = 32, PF = 0.5.7FIGURE 2-7: Measurement Error, Gain = 1, PF = 1.8FIGURE 2-8: Measurement Error, Gain = 2, PF = 1.8FIGURE 2-9: Measurement Error, Gain = 1, PF = + 0.5.8FIGURE 2-10: Measurement Error, Gain = 2, PF = + 0.5.8FIGURE 2-11: Measurement Error vs. Input Frequency.9FIGURE 2-12: Channel 0 Offset Error (DC Mode, HPF off), G = 1.9FIGURE 2-13: Channel 0 Offset Error (DC Mode, HPF off), G = 8.9FIGURE 2-14: Channel 0 Offset Error (DC Mode, HPF Off), G = 16.9FIGURE 2-15: Measurement Error vs. VDD (G = 16).9FIGURE 2-16: Measurement Error vs. VDD, G = 16, External VREF.9FIGURE 2-17: Measurement Error with External VREF, (G = 1).10FIGURE 2-18: Measurement Error with External VREF, (G = 8).10FIGURE 2-19: Measurement Error with External VREF (G = 16).103.0 Pin Descriptions11TABLE 3-1: Pin Function Table113.1 Digital VDD (DVDD)113.2 High-Pass Filter Input Logic Pin (HPF)113.3 Analog VDD (AVDD)113.4 Current Channel (CH0-, CH0+)123.5 Voltage Channel (CH1-,CH1+)123.6 Master Clear (MCLR)123.7 Reference (REFIN/OUT)123.8 Analog Ground (AGND)123.9 Frequency Control Logic Pins (F2, F1, F0)123.10 Gain Control Logic Pins (G1, G0)123.11 Oscillator (OSC1, OSC2)123.12 Negative Power Output Logic Pin (NEG)123.13 Ground Connection (DGND)123.14 High-Frequency Output (HFOUT)133.15 Frequency Output (FOUT0, FOUT1)134.0 Device Overview15FIGURE 4-1: Simplified MCP3905/06 Block Diagram with Frequency Contents.154.1 Analog Inputs16TABLE 4-1: MCP3905 GAIN SELECTIONS16TABLE 4-2: MCP3906 GAIN SELECTIONS164.2 16-Bit Delta-Sigma ADCs16FIGURE 4-2: SINC Filter Magnitude Response (MCLK = 3.58 MHz).164.3 Ultra-Low Drift VREF164.4 Power-On Reset (POR)17FIGURE 4-3: Power-on Reset Operation.174.5 High-Pass Filters and Multiplier17FIGURE 4-4: HPF Magnitude Response (MCLK = 3.58 MHz).174.6 Low-Pass Filter and DTF Converter18FIGURE 4-5: LPF Magnitude Response (MCLK = 3.58 MHz).184.7 FOUT0/1 and HFOUT Output Frequencies19TABLE 4-3: Output Frequency Constant FC for FOUT0/1 (VREF = 2.4V)19TABLE 4-4: Output Frequency Constant HFC for HFOUT (VREF = 2.4V)205.0 Applications Information215.1 Meter Design using the MCP3905/06216.0 Packaging Information236.1 Package Marking Information23文件大小： 375.4 KB页数： 30Language: English打开用户手册
