用户手册 — Microchip Technology MCP6N11T-001E/MNY Linear IC TDFN-8

目录

• 500 kHz, 800 µA Instrumentation Amplifier

  1
• TABLE 1: Key Differentiating Specifications

  2
• 1.0 Electrical Characteristics

  3
  • 1.1 Absolute Maximum Ratings †

    3
  • 1.2 Specifications

    3
    • TABLE 1-1: DC Electrical Specifications

      3
    • TABLE 1-2: AC Electrical Specifications

      6
    • TABLE 1-3: Digital Electrical Specifications

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    • TABLE 1-4: Temperature Specifications

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  • 1.3 Timing Diagrams

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    • FIGURE 1-1: Common Mode Input Overdrive Recovery Timing Diagram.

      8
    • FIGURE 1-2: Differential Mode Input Overdrive Recovery Timing Diagram.

      8
    • FIGURE 1-3: Output Overdrive Recovery Timing Diagram.

      8
    • FIGURE 1-4: POR Timing Diagram.

      8
    • FIGURE 1-5: EN/CAL Timing Diagram.

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  • 1.4 DC Test Circuits

    9
    • FIGURE 1-6: Test Circuit for Common Mode (Input Offset).

      9
    • TABLE 1-5: Selecting RF and RG

      9
    • FIGURE 1-7: Test Circuit for Differential Mode.

      9
    • TABLE 1-6: Selecting RF and RG

      9
  • 1.5 Explanation of DC Error Specs

    10
    • FIGURE 1-8: Input Offset Error vs. Common Mode Input Voltage.

      10
    • FIGURE 1-9: Differential Input Error vs. Differential Input Voltage.

      11
• 2.0 Typical Performance Curves

  13
  • 2.1 DC Voltages and Currents

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    • FIGURE 2-1: Normalized Input Offset Voltage, with GMIN = 1 to 10.

      13
    • FIGURE 2-2: Normalized Input Offset Voltage, with GMIN = 100.

      13
    • FIGURE 2-3: Normalized Input Offset Voltage Drift, with GMIN = 1 to 10.

      13
    • FIGURE 2-4: Normalized Input Offset Voltage Drift, with GMIN = 100.

      13
    • FIGURE 2-5: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 1 to 10.

      14
    • FIGURE 2-6: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 100.

      14
    • FIGURE 2-7: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 1 to 10.

      14
    • FIGURE 2-8: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 100.

      14
    • FIGURE 2-9: Normalized Input Offset Voltage vs. Output Voltage, with GMIN = 1 to 10.

      14
    • FIGURE 2-10: Normalized Input Offset Voltage vs. Output Voltage, with GMIN = 100.

      14
    • FIGURE 2-11: Input Common Mode Voltage Headroom vs. Ambient Temperature.

      15
    • FIGURE 2-12: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 1 to 10.

      15
    • FIGURE 2-13: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 100.

      15
    • FIGURE 2-14: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 1 to 10.

      15
    • FIGURE 2-15: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 100.

      15
    • FIGURE 2-16: Normalized CMRR and PSRR vs. Ambient Temperature.

      15
    • FIGURE 2-17: Normalized DC Open-Loop Gain vs. Ambient Temperature.

      16
    • FIGURE 2-18: The MCP6N11 Shows No Phase Reversal vs. Common Mode Voltage.

      16
    • FIGURE 2-19: Normalized Differential Mode Voltage Range vs. Ambient Temperature.

      16
    • FIGURE 2-20: Normalized Differential Input Error vs. Differential Voltage, with GMIN = 1.

      16
    • FIGURE 2-21: Normalized Differential Input Error vs. Differential Voltage, with GMIN = 2 to 100.

      16
    • FIGURE 2-22: The MCP6N11 Shows No Phase Reversal vs. Differential Voltage, with VDD = 5.5V.

      16
    • FIGURE 2-23: Input Bias and Offset Currents vs. Ambient Temperature, with VDD = +5.5V.

      17
    • FIGURE 2-24: Input Bias Current vs. Input Voltage (below VSS).

      17
    • FIGURE 2-25: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +85°C.

      17
    • FIGURE 2-26: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +125°C.

      17
    • FIGURE 2-27: Output Voltage Headroom vs. Output Current.

      17
    • FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature.

      17
    • FIGURE 2-29: Output Short Circuit Current vs. Power Supply Voltage.

      18
    • FIGURE 2-30: Supply Current vs. Power Supply Voltage.

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    • FIGURE 2-31: Supply Current vs. Common Mode Input Voltage.

      18
  • 2.2 Frequency Response

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    • FIGURE 2-32: CMRR vs. Frequency.

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    • FIGURE 2-33: PSRR vs. Frequency.

      19
    • FIGURE 2-34: Normalized Open-Loop Gain vs. Frequency.

      19
    • FIGURE 2-35: Normalized Gain Bandwidth Product and Phase Margin vs. Ambient Temperature.

      19
    • FIGURE 2-36: Closed-Loop Output Impedance vs. Frequency.

      19
    • FIGURE 2-37: Gain Peaking vs. Normalized Capacitive Load.

      19
  • 2.3 Noise

    20
    • FIGURE 2-38: Normalized Input Noise Voltage Density vs. Frequency.

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    • FIGURE 2-39: Normalized Input Noise Voltage Density vs. Input Common Mode Voltage, with f = 100 Hz.

      20
    • FIGURE 2-40: Normalized Input Noise Voltage Density vs. Input Common Mode Voltage, with f = 10 kHz.

      20
    • FIGURE 2-41: Normalized Input Noise Voltage vs. Time, with GMIN = 1 to 10.

      20
    • FIGURE 2-42: Normalized Input Noise Voltage vs. Time, with GMIN = 100.

      20
  • 2.4 Time Response

    21
    • FIGURE 2-43: Small Signal Step Response.

      21
    • FIGURE 2-44: Large Signal Step Response.

      21
    • FIGURE 2-45: Slew Rate vs. Ambient Temperature.

      21
    • FIGURE 2-46: Maximum Output Voltage Swing vs. Frequency.

      21
    • FIGURE 2-47: Common Mode Input Overdrive Recovery Time vs. Normalized Gain.

      21
    • FIGURE 2-48: Differential Input Overdrive Recovery Time vs. Normalized Gain.

      21
    • FIGURE 2-49: Output Overdrive Recovery Time vs. Normalized Gain.

      22
    • FIGURE 2-50: The MCP6N11 Shows No Phase Reversal vs. Common Mode Input Overdrive, with VDD = 5.5V.

      22
    • FIGURE 2-51: The MCP6N11 Shows No Phase Reversal vs. Differential Input Overdrive, with VDD = 5.5V.

      22
  • 2.5 Enable/Calibration and POR Responses

    23
    • FIGURE 2-52: EN/CAL and Output Voltage vs. Time, with VDD = 1.8V.

      23
    • FIGURE 2-53: EN/CAL and Output Voltage vs. Time, with VDD = 5.5V

      23
    • FIGURE 2-54: EN/CAL Hysteresis vs. Ambient Temperature.

      23
    • FIGURE 2-55: EN/CAL Turn On Time vs. Ambient Temperature.

      23
    • FIGURE 2-56: Power Supply On and Off and Output Voltage vs. Time.

      23
    • FIGURE 2-57: POR Trip Voltages and Hysteresis vs. Temperature.

      23
    • FIGURE 2-58: Quiescent Current in Shutdown vs. Power Supply Voltage.

      24
    • FIGURE 2-59: Output Leakage Current vs. Output Voltage.

      24
• 3.0 Pin Descriptions

  25
  • TABLE 3-1: Pin Function Table

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  • 3.1 Analog Signal Inputs

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  • 3.2 Analog Feedback Input

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  • 3.3 Analog Reference Input

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  • 3.4 Analog Output

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  • 3.5 Power Supply Pins

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  • 3.6 Digital Enable and VOS Calibration Input

    25
  • 3.7 Exposed Thermal Pad (EP)

    25
• 4.0 Applications

  27
  • 4.1 Basic Performance

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    • FIGURE 4-1: Standard Circuit.

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    • FIGURE 4-2: MCP6N11 Block Diagram.

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    • FIGURE 4-3: DC Bias Resistors.

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  • 4.2 Functional Blocks

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    • FIGURE 4-4: Simplified Analog Input ESD Structures.

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    • FIGURE 4-5: Protecting the Analog Inputs Against High Voltages.

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    • FIGURE 4-6: Protecting the Analog Inputs Against High Currents.

      30
    • FIGURE 4-7: Input Voltage Ranges.

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  • 4.3 Applications Tips

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    • FIGURE 4-8: Output Resistor, RISO stabilizes large capacitive loads.

      31
    • FIGURE 4-9: Recommended RISO Values for Capacitive Loads.

      32
    • FIGURE 4-10: Simple Gain Circuit with Parasitic Capacitances.

      32
  • 4.4 Typical Applications

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    • FIGURE 4-11: Difference Amplifier.

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    • FIGURE 4-12: Difference Amplifier with Very Large Common Mode Component.

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    • FIGURE 4-13: High Side Current Detector.

      33
    • FIGURE 4-14: Wheatstone Bridge Amplifier.

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• 5.0 Design Aids

  35
  • 5.1 Microchip Advanced Part Selector (MAPS)

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  • 5.2 Analog Demonstration Board

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  • 5.3 Application Notes

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• 6.0 Packaging Information

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  • 6.1 Package Marking Information

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• Appendix A: Revision History

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  • Revision A (October 2011)

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• Product Identification System

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• Trademarks

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• Worldwide Sales and Service

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