用户手册目录AT E Series User Manual1Support2Worldwide Technical Support and Product Information2National Instruments Corporate Headquarters2Worldwide Offices2Important Information3Warranty3Copyright3Trademarks3Patents3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Compliance4Contents6About This Manual10Conventions10National Instruments Documentation11Related Documentation12Chapter 1 Introduction13About the ATESeries13What You Need to Get Started14Software Programming Choices15NI-DAQ15Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and the Hardware15National Instruments ADE Software16Register-Level Programming16Optional Equipment17Custom Cabling17Unpacking18Safety Information18Chapter 2 Installing and Configuring the Device21Installing the Software21Installing the Hardware21Configuring the Device22Bus Interface22Plug and Play22Switchless Data Acquisition23Base I/O Address Selection23DMA Channel Selection23Interrupt Channel Selection23Table 2-1. PC AT I/O Address Map24Table 2-2. PC AT Interrupt Assignment Map25Table 2-3. PC AT 16-bit DMA Channel Assignment Map26Chapter 3 Hardware Overview27Figure 3-1. AT-MIO-16E-1 and AT-MIO-16E-2 Block Diagram27Figure 3-2. AT-MIO-64E-3 Block Diagram28Figure 3-3. AT-MIO-16E-10 and AT-MIO-16DE-10 Block Diagram29Figure 3-4. AT-MIO-16XE-10 Block Diagram30Figure 3-5. AT-AI-16XE-10 Block Diagram31Figure 3-6. AT-MIO-16XE-50 Block Diagram32Analog Input32Input Mode32Table 3-1. Available Input Configurations for the AT E Series33Input Polarity and Input Range33Table 3-2. Actual Range and Measurement Precision34Table 3-3. Actual Range and Measurement Precision for the AT-MIO-16XE-10, AT-AI-16XE-10...35Considerations for Selecting Input Ranges36Dither36Figure 3-7. Dither37Multiple-Channel Scanning Considerations37Analog Output39Analog Output Reference Selection39Analog Output Polarity Selection39Analog Output Reglitch Selection40Analog Trigger40Figure 3-8. Analog Trigger Block Diagram41Figure 3-9. Below-Low-Level Analog Triggering Mode42Figure 3-10. Above-High-Level Analog Triggering Mode42Figure 3-11. Inside-Region Analog Triggering Mode42Figure 3-12. High-Hysteresis Analog Triggering Mode43Figure 3-13. Low-Hysteresis Analog Triggering Mode43Digital I/O44Timing Signal Routing44Figure 3-14. CONVERT* Signal Routing45Programmable Function Inputs46Device and RTSI Clocks46RTSI Triggers46Figure 3-15. RTSI Bus Signal Connection47Chapter 4 Connecting Signals48Table 4-1. I/O Connector Details48I/O Connector48Figure 4-1. I/O Connector Pin Assignment for the AT-MIO-16E-1, AT-MIO-16E-2, AT-MIO-16E-10...49Figure 4-2. I/O Connector Pin Assignment for the AT-MIO-64E-350Figure 4-3. I/O Connector Pin Assignment for the AT-MIO-16DE-1051I/O Connector Signal Descriptions52Table 4-2. I/O Signal Summary for the AT E Series52Table 4-3. I/O Signal Summary for the AT-MIO-16E-1, AT-MIO-16E-2, and AT-MIO-64E-355Table 4-4. I/O Signal Summary for the AT-MIO-16E-10 and AT-MIO-16DE-1057Table 4-5. I/O Signal Summary for the AT-MIO-16XE-10 and AT-AI-16XE-1059Table 4-6. I/O Signal Summary for the AT-MIO-16XE-5060Analog Input Signal Connections62Figure 4-4. AT E Series PGIA63Types of Signal Sources64Floating Signal Sources64Ground-Referenced Signal Sources64Input Configurations65Figure 4-5. Summary of Analog Input Connections66Differential Connection Considerations (DIFF Input Configuration)67Differential Connections for Ground-Referenced Signal Sources68Figure 4-6. Differential Input Connections for Ground-Referenced Signals68Differential Connections for Nonreferenced or Floating Signal Sources69Figure 4-7. Differential Input Connections for Nonreferenced Signals69Single-Ended Connection Considerations71Single-Ended Connections for Floating Signal Sources (RSE Configuration)72Figure 4-8. Single-Ended Input Connections for Nonreferenced or Floating Signals72Single-Ended Connections for Grounded Signal Sources (NRSE Configuration)72Figure 4-9. Single-Ended Input Connections for Ground-Referenced Signal73Common-Mode Signal Rejection Considerations73Analog Output Signal Connections74Figure 4-10. AO Connections75Digital I/O Signal Connections75Figure 4-11. DIO Connections76Power Connections76Timing Connections77Figure 4-12. TIO Connections78Programmable Function Input Connections78DAQ Timing Connections79Figure 4-13. Typical Posttriggered Acquisition79Figure 4-14. Typical Pretriggered Acquisition80TRIG1 Signal80Figure 4-15. TRIG1 Input Signal Timing81Figure 4-16. TRIG1 Output Signal Timing81TRIG2 Signal81Figure 4-17. TRIG2 Input Signal Timing82Figure 4-18. TRIG2 Output Signal Timing82STARTSCAN Signal83Figure 4-19. STARTSCAN Input Signal Timing83Figure 4-20. STARTSCAN Output Signal Timing84CONVERT* Signal85Figure 4-21. CONVERT* Input Signal Timing85Figure 4-22. CONVERT* Output Signal Timing85AIGATE Signal86SISOURCE Signal86Figure 4-23. SISOURCE Signal Timing87SCANCLK Signal87Figure 4-24. SCANCLK Signal Timing87EXTSTROBE* Signal88Figure 4-25. EXTSTROBE* Signal Timing88Waveform Generation Timing Connections88WFTRIG Signal88Figure 4-26. WFTRIG Input Signal Timing89Figure 4-27. WFTRIG Output Signal Timing89UPDATE* Signal89Figure 4-28. UPDATE* Input Signal Timing90Figure 4-29. UPDATE* Output Signal Timing90UISOURCE Signal91Figure 4-30. UISOURCE Signal Timing91General-Purpose Timing Signal Connections91GPCTR0_SOURCE Signal91Figure 4-31. GPCTR0_SOURCE Signal Timing92GPCTR0_GATE Signal92Figure 4-32. GPCTR0_GATE Signal Timing in Edge-Detection Mode93GPCTR0_OUT Signal93Figure 4-33. GPCTR0_OUT Signal Timing93GPCTR0_UP_DOWN Signal93GPCTR1_SOURCE Signal94Figure 4-34. GPCTR1_SOURCE Signal Timing94GPCTR1_GATE Signal94Figure 4-35. GPCTR1_GATE Signal Timing in Edge-Detection Mode95GPCTR1_OUT Signal95Figure 4-36. GPCTR1_OUT Signal Timing95GPCTR1_UP_DOWN Signal95Figure 4-37. GPCTR Timing Summary96FREQ_OUT Signal97Timing Specifications for Digital I/O Ports A, B, and C97Table 4-7. Port C Signal Assignments97Table 4-8. Port C Signal Descriptions98Mode 1 Input Timing99Figure 4-38. Mode 1 Input Timing99Mode 1 Output Timing100Figure 4-39. Mode 1 Output Timing100Mode 2 Bidirectional Timing101Figure 4-40. Mode 2 Bidirectional Timing101Field Wiring Considerations102Chapter 5 Calibrating the Device103Loading Calibration Constants103Self-Calibration104External Calibration104Other Considerations105Appendix A Specifications106Appendix B Optional Cable Connector Descriptions146Figure B-1. 68-Pin MIO Connector Pin Assignments147Figure B-2. 68-Pin DIO Connector Pin Assignments148Figure B-3. 68-Pin Extended AI Connector Pin Assignments149Figure B-4. 50-Pin MIO Connector Pin Assignments150Figure B-5. 50-Pin DIO Connector Pin Assignments151Figure B-6. 50-Pin Extended AI Connector Pin Assignments152Appendix C Common Questions153Figure C-1. Configuring Channels for Different Acquisition Modes in LabVIEW157Figure C-2. Comparing Interchannel Delay and Scan Interval159Table C-1. Signal Name Equivalencies161Appendix D Technical Support and Professional Services163Glossary164Numbers/Symbols164A164B-D165E-G166H-L167M-R168S-U169V-W170Index171Symbols171A171B-D173E-F175G-H176I-M177N-P178Q-S180T183U-W184文件大小: 1.6 MB页数: 184Language: English打开用户手册
用户手册目录AT E Series User Manual1Support2Worldwide Technical Support and Product Information2National Instruments Corporate Headquarters2Worldwide Offices2Important Information3Warranty3Copyright3Trademarks3Patents3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Compliance4Contents6About This Manual10Conventions10National Instruments Documentation11Related Documentation12Chapter 1 Introduction13About the ATESeries13What You Need to Get Started14Software Programming Choices15NI-DAQ15Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and the Hardware15National Instruments ADE Software16Register-Level Programming16Optional Equipment17Custom Cabling17Unpacking18Safety Information18Chapter 2 Installing and Configuring the Device21Installing the Software21Installing the Hardware21Configuring the Device22Bus Interface22Plug and Play22Switchless Data Acquisition23Base I/O Address Selection23DMA Channel Selection23Interrupt Channel Selection23Table 2-1. PC AT I/O Address Map24Table 2-2. PC AT Interrupt Assignment Map25Table 2-3. PC AT 16-bit DMA Channel Assignment Map26Chapter 3 Hardware Overview27Figure 3-1. AT-MIO-16E-1 and AT-MIO-16E-2 Block Diagram27Figure 3-2. AT-MIO-64E-3 Block Diagram28Figure 3-3. AT-MIO-16E-10 and AT-MIO-16DE-10 Block Diagram29Figure 3-4. AT-MIO-16XE-10 Block Diagram30Figure 3-5. AT-AI-16XE-10 Block Diagram31Figure 3-6. AT-MIO-16XE-50 Block Diagram32Analog Input32Input Mode32Table 3-1. Available Input Configurations for the AT E Series33Input Polarity and Input Range33Table 3-2. Actual Range and Measurement Precision34Table 3-3. Actual Range and Measurement Precision for the AT-MIO-16XE-10, AT-AI-16XE-10...35Considerations for Selecting Input Ranges36Dither36Figure 3-7. Dither37Multiple-Channel Scanning Considerations37Analog Output39Analog Output Reference Selection39Analog Output Polarity Selection39Analog Output Reglitch Selection40Analog Trigger40Figure 3-8. Analog Trigger Block Diagram41Figure 3-9. Below-Low-Level Analog Triggering Mode42Figure 3-10. Above-High-Level Analog Triggering Mode42Figure 3-11. Inside-Region Analog Triggering Mode42Figure 3-12. High-Hysteresis Analog Triggering Mode43Figure 3-13. Low-Hysteresis Analog Triggering Mode43Digital I/O44Timing Signal Routing44Figure 3-14. CONVERT* Signal Routing45Programmable Function Inputs46Device and RTSI Clocks46RTSI Triggers46Figure 3-15. RTSI Bus Signal Connection47Chapter 4 Connecting Signals48Table 4-1. I/O Connector Details48I/O Connector48Figure 4-1. I/O Connector Pin Assignment for the AT-MIO-16E-1, AT-MIO-16E-2, AT-MIO-16E-10...49Figure 4-2. I/O Connector Pin Assignment for the AT-MIO-64E-350Figure 4-3. I/O Connector Pin Assignment for the AT-MIO-16DE-1051I/O Connector Signal Descriptions52Table 4-2. I/O Signal Summary for the AT E Series52Table 4-3. I/O Signal Summary for the AT-MIO-16E-1, AT-MIO-16E-2, and AT-MIO-64E-355Table 4-4. I/O Signal Summary for the AT-MIO-16E-10 and AT-MIO-16DE-1057Table 4-5. I/O Signal Summary for the AT-MIO-16XE-10 and AT-AI-16XE-1059Table 4-6. I/O Signal Summary for the AT-MIO-16XE-5060Analog Input Signal Connections62Figure 4-4. AT E Series PGIA63Types of Signal Sources64Floating Signal Sources64Ground-Referenced Signal Sources64Input Configurations65Figure 4-5. Summary of Analog Input Connections66Differential Connection Considerations (DIFF Input Configuration)67Differential Connections for Ground-Referenced Signal Sources68Figure 4-6. Differential Input Connections for Ground-Referenced Signals68Differential Connections for Nonreferenced or Floating Signal Sources69Figure 4-7. Differential Input Connections for Nonreferenced Signals69Single-Ended Connection Considerations71Single-Ended Connections for Floating Signal Sources (RSE Configuration)72Figure 4-8. Single-Ended Input Connections for Nonreferenced or Floating Signals72Single-Ended Connections for Grounded Signal Sources (NRSE Configuration)72Figure 4-9. Single-Ended Input Connections for Ground-Referenced Signal73Common-Mode Signal Rejection Considerations73Analog Output Signal Connections74Figure 4-10. AO Connections75Digital I/O Signal Connections75Figure 4-11. DIO Connections76Power Connections76Timing Connections77Figure 4-12. TIO Connections78Programmable Function Input Connections78DAQ Timing Connections79Figure 4-13. Typical Posttriggered Acquisition79Figure 4-14. Typical Pretriggered Acquisition80TRIG1 Signal80Figure 4-15. TRIG1 Input Signal Timing81Figure 4-16. TRIG1 Output Signal Timing81TRIG2 Signal81Figure 4-17. TRIG2 Input Signal Timing82Figure 4-18. TRIG2 Output Signal Timing82STARTSCAN Signal83Figure 4-19. STARTSCAN Input Signal Timing83Figure 4-20. STARTSCAN Output Signal Timing84CONVERT* Signal85Figure 4-21. CONVERT* Input Signal Timing85Figure 4-22. CONVERT* Output Signal Timing85AIGATE Signal86SISOURCE Signal86Figure 4-23. SISOURCE Signal Timing87SCANCLK Signal87Figure 4-24. SCANCLK Signal Timing87EXTSTROBE* Signal88Figure 4-25. EXTSTROBE* Signal Timing88Waveform Generation Timing Connections88WFTRIG Signal88Figure 4-26. WFTRIG Input Signal Timing89Figure 4-27. WFTRIG Output Signal Timing89UPDATE* Signal89Figure 4-28. UPDATE* Input Signal Timing90Figure 4-29. UPDATE* Output Signal Timing90UISOURCE Signal91Figure 4-30. UISOURCE Signal Timing91General-Purpose Timing Signal Connections91GPCTR0_SOURCE Signal91Figure 4-31. GPCTR0_SOURCE Signal Timing92GPCTR0_GATE Signal92Figure 4-32. GPCTR0_GATE Signal Timing in Edge-Detection Mode93GPCTR0_OUT Signal93Figure 4-33. GPCTR0_OUT Signal Timing93GPCTR0_UP_DOWN Signal93GPCTR1_SOURCE Signal94Figure 4-34. GPCTR1_SOURCE Signal Timing94GPCTR1_GATE Signal94Figure 4-35. GPCTR1_GATE Signal Timing in Edge-Detection Mode95GPCTR1_OUT Signal95Figure 4-36. GPCTR1_OUT Signal Timing95GPCTR1_UP_DOWN Signal95Figure 4-37. GPCTR Timing Summary96FREQ_OUT Signal97Timing Specifications for Digital I/O Ports A, B, and C97Table 4-7. Port C Signal Assignments97Table 4-8. Port C Signal Descriptions98Mode 1 Input Timing99Figure 4-38. Mode 1 Input Timing99Mode 1 Output Timing100Figure 4-39. Mode 1 Output Timing100Mode 2 Bidirectional Timing101Figure 4-40. Mode 2 Bidirectional Timing101Field Wiring Considerations102Chapter 5 Calibrating the Device103Loading Calibration Constants103Self-Calibration104External Calibration104Other Considerations105Appendix A Specifications106Appendix B Optional Cable Connector Descriptions146Figure B-1. 68-Pin MIO Connector Pin Assignments147Figure B-2. 68-Pin DIO Connector Pin Assignments148Figure B-3. 68-Pin Extended AI Connector Pin Assignments149Figure B-4. 50-Pin MIO Connector Pin Assignments150Figure B-5. 50-Pin DIO Connector Pin Assignments151Figure B-6. 50-Pin Extended AI Connector Pin Assignments152Appendix C Common Questions153Figure C-1. Configuring Channels for Different Acquisition Modes in LabVIEW157Figure C-2. Comparing Interchannel Delay and Scan Interval159Table C-1. Signal Name Equivalencies161Appendix D Technical Support and Professional Services163Glossary164Numbers/Symbols164A164B-D165E-G166H-L167M-R168S-U169V-W170Index171Symbols171A171B-D173E-F175G-H176I-M177N-P178Q-S180T183U-W184文件大小: 1.6 MB页数: 184Language: English打开用户手册