用户手册目录NI 6238/6239 User Manual1Support2Worldwide Technical Support and Product Information2National Instruments Corporate Headquarters2Worldwide Offices2Important Information3Warranty3Copyright3Trademarks3Patents3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Contents5About This Manual12Conventions12Related Documentation13NI-DAQ13NI-DAQmx for Linux13NI-DAQmx Base14LabVIEW14LabWindows™/CVI™15Measurement Studio15ANSI C without NI Application Software15.NET Languages without NI Application Software16Device Documentation and Specifications16Training Courses16Technical Support on the Web16Chapter 1 Getting Started17Installing NI-DAQmx17Installing Other Software17Installing the Hardware17Device Pinouts17Device Specifications18Device Accessories and Cables18Chapter 2 DAQ System Overview19Figure 2-1. Components of a Typical DAQ System19DAQ Hardware19Figure 2-2. General NI 6238/6239 Block Diagram20DAQ-STC220Calibration Circuitry21Sensors and Transducers21Cables and Accessories22Custom Cabling22Programming Devices in Software23Chapter 3 Connector Information24I/O Connector Signal Descriptions24Table 3-1. I/O Connector Signals24RTSI Connector Pinout26Chapter 4 Analog Input27Figure 4-1. NI 6238/6239 Analog Input Circuitry27Analog Input Circuitry27Analog Input Range28Table 4-1. Input Ranges for NI 6238/623929Connecting Analog Current Input Signals29Method 129Figure 4-2. Analog Current Input Connection Method 130Method 230Figure 4-3. Analog Current Input Connection Method 230Figure 4-4. Current Measurement at High Voltage Levels31Analog Input Ground-Reference Settings31Figure 4-5. NI 6238/6239 PGIA32Table 4-2. Signals Routed to the NI-PGIA32Configuring AI Ground-Reference Settings in Software33Figure 4-6. Enabling Multimode Scanning in LabVIEW33Multichannel Scanning Considerations34Use Short High-Quality Cabling34Minimize Current Step between Adjacent Channels34Avoid Scanning Faster Than Necessary35Example 135Example 235Analog Input Data Acquisition Methods36Software-Timed Acquisitions36Hardware-Timed Acquisitions36Buffered36Non-Buffered37Analog Input Triggering37Field Wiring Considerations37Analog Input Timing Signals38Figure 4-7. Analog Input Timing Options38Figure 4-8. Interval Sampling39Figure 4-9. Posttriggered Data Acquisition Example40Figure 4-10. Pretriggered Data Acquisition Example41AI Sample Clock Signal41Using an Internal Source42Using an External Source42Routing AI Sample Clock Signal to an Output Terminal42Other Timing Requirements43Figure 4-11. ai/SampleClock and ai/StartTrigger43AI Sample Clock Timebase Signal43AI Convert Clock Signal44Using an Internal Source44Using an External Source45Routing AI Convert Clock Signal to an Output Terminal45Using a Delay from Sample Clock to Convert Clock45Figure 4-12. ai/SampleClock and ai/ConvertClock46Other Timing Requirements46Figure 4-13. Single External Signal Driving ai/SampleClock and ai/ConvertClock Simultaneously47AI Convert Clock Timebase Signal47AI Hold Complete Event Signal47AI Start Trigger Signal48Using a Digital Source48Routing AI Start Trigger to an Output Terminal48AI Reference Trigger Signal49Figure 4-14. Reference Trigger Final Buffer49Using a Digital Source50Routing AI Reference Trigger Signal to an Output Terminal50AI Pause Trigger Signal50Using a Digital Source50Routing AI Pause Trigger Signal to an Output Terminal51Getting Started with AI Applications in Software51Chapter 5 Analog Output52Figure 5-1. NI 6238/6239 Analog Current Output Circuitry52Analog Output Circuitry52Analog Output Data Generation Methods53Software-Timed Generations53Hardware-Timed Generations53Non-Buffered54Buffered54Analog Output Triggering55Connecting Analog Current Output Signals55Figure 5-2. Analog Current Output Connections55Analog Output Timing Signals56Figure 5-3. Analog Output Timing Options56AO Start Trigger Signal56Using a Digital Source57Routing AO Start Trigger Signal to an Output Terminal57AO Pause Trigger Signal57Figure 5-4. ao/PauseTrigger with the Onboard Clock Source58Figure 5-5. ao/PauseTrigger with Other Signal Source58Using a Digital Source58Routing AO Pause Trigger Signal to an Output Terminal59AO Sample Clock Signal59Using an Internal Source59Using an External Source59Routing AO Sample Clock Signal to an Output Terminal59Other Timing Requirements60Figure 5-6. ao/SampleClock and ao/StartTrigger60AO Sample Clock Timebase Signal60Getting Started with AO Applications in Software61Chapter 6 Digital Input and Output62I/O Protection62Programmable Power-Up States62Connecting Digital I/O Signals63Figure 6-1. NI 6238 Digital I/O Connections (DO Source)63Figure 6-2. NI 6239 Digital I/O Connections (DO Sink)64Logic Conventions64Table 6-1. NI 6238/6239 Logic Conventions65Getting Started with DIO Applications in Software65Chapter 7 Counters66Figure 7-1. M Series Counters67Counter Input Applications68Counting Edges68Single Point (On-Demand) Edge Counting68Figure 7-2. Single Point (On-Demand) Edge Counting68Figure 7-3. Single Point (On-Demand) Edge Counting with Pause Trigger69Buffered (Sample Clock) Edge Counting69Figure 7-4. Buffered (Sample Clock) Edge Counting69Non-Cumulative Buffered Edge Counting70Figure 7-5. Non-Cumulative Buffered Edge Counting70Controlling the Direction of Counting70Pulse-Width Measurement71Single Pulse-Width Measurement71Figure 7-6. Single Pulse-Width Measurement71Buffered Pulse-Width Measurement71Figure 7-7. Buffered Pulse-Width Measurement72Period Measurement72Single Period Measurement73Figure 7-8. Single Period Measurement73Buffered Period Measurement73Figure 7-9. Buffered Period Measurement74Semi-Period Measurement74Single Semi-Period Measurement74Buffered Semi-Period Measurement75Figure 7-10. Buffered Semi-Period Measurement75Frequency Measurement75Method 1-Measure Low Frequency with One Counter75Figure 7-11. Method 176Method 1b-Measure Low Frequency with One Counter (Averaged)76Figure 7-12. Method 1b77Method 2-Measure High Frequency with Two Counters77Figure 7-13. Method 278Method 3-Measure Large Range of Frequencies Using Two Counters78Figure 7-14. Method 379Choosing a Method for Measuring Frequency79Table 7-1. Frequency Measurement Method 180Table 7-2. Frequency Measurement Method Comparison81Position Measurement81Measurements Using Quadrature Encoders81Figure 7-15. X1 Encoding82Figure 7-16. X2 Encoding82Figure 7-17. X4 Encoding82Figure 7-18. Channel Z Reload with X4 Decoding83Measurements Using Two Pulse Encoders83Figure 7-19. Measurements Using Two Pulse Encoders83Two-Signal Edge-Separation Measurement84Single Two-Signal Edge-Separation Measurement84Figure 7-20. Single Two-Signal Edge-Separation Measurement85Buffered Two-Signal Edge-Separation Measurement85Figure 7-21. Buffered Two-Signal Edge-Separation Measurement85Counter Output Applications86Simple Pulse Generation86Single Pulse Generation86Figure 7-22. Single Pulse Generation86Single Pulse Generation with Start Trigger86Figure 7-23. Single Pulse Generation with Start Trigger87Retriggerable Single Pulse Generation87Figure 7-24. Retriggerable Single Pulse Generation87Pulse Train Generation88Continuous Pulse Train Generation88Figure 7-25. Continuous Pulse Train Generation88Frequency Generation89Using the Frequency Generator89Figure 7-26. Frequency Generator Block Diagram89Figure 7-27. Frequency Generator Output Waveform89Frequency Division90Pulse Generation for ETS90Figure 7-28. Pulse Generation for ETS91Counter Timing Signals91Counter n Source Signal91Table 7-3. Counter Applications and Counter n Source92Routing a Signal to Counter n Source92Routing Counter n Source to an Output Terminal92Counter n Gate Signal93Routing a Signal to Counter n Gate93Routing Counter n Gate to an Output Terminal93Counter n Aux Signal93Routing a Signal to Counter n Aux93Counter n A, Counter n B, and Counter n Z Signals94Routing Signals to A, B, and Z Counter Inputs94Routing Counter n Z Signal to an Output Terminal94Counter n Up_Down Signal94Counter n HW Arm Signal94Routing Signals to Counter n HW Arm Input95Counter n Internal Output and Counter n TC Signals95Routing Counter n Internal Output to an Output Terminal95Frequency Output Signal95Routing Frequency Output to a Terminal96Default Counter Terminals96Table 7-4. NI 6238/6239 Device Default NI-DAQmx Counter/Timer Pins96Counter Triggering97Arm Start Trigger97Start Trigger97Pause Trigger97Other Counter Features98Cascading Counters98Counter Filters98Table 7-5. Filters98Figure 7-29. Filter Example99Prescaling99Figure 7-30. Prescaling100Duplicate Count Prevention100Example Application That Works Correctly (No Duplicate Counting)100Figure 7-31. Duplicate Count Prevention Example101Example Application That Works Incorrectly (Duplicate Counting)101Figure 7-32. Duplicate Count Example102Example Application That Prevents Duplicate Count102Figure 7-33. Duplicate Count Prevention Example102When To Use Duplicate Count Prevention103Enabling Duplicate Count Prevention in NI-DAQmx103Synchronization Modes103Table 7-6. Synchronization Mode Conditions10480 MHz Source Mode104Figure 7-34. 80 MHz Source Mode104Other Internal Source Mode104Figure 7-35. Other Internal Source Mode105External Source Mode105Figure 7-36. External Source Mode105Chapter 8 PFI106Figure 8-1. NI 6238/6239 PFI Input Circuitry106Figure 8-2. NI 6238/6239 PFI Output Circuitry107Using PFI Terminals as Timing Input Signals107Exporting Timing Output Signals Using PFI Terminals108Using PFI Terminals as Static Digital Inputs and Outputs108Connecting PFI Input Signals108Figure 8-3. PFI Input Signals Connections109PFI Filters109Table 8-1. Filters110Figure 8-4. Filter Example110I/O Protection110Programmable Power-Up States111Connecting Digital I/O Signals111Figure 8-5. NI 6238 Digital I/O Connections (DO Source)112Figure 8-6. NI 6239 Digital I/O Connections (DO Sink)113Chapter 9 Isolation and Digital Isolators114Table 9-1. Ground Symbols114Figure 9-1. General NI 6238/6239 Block Diagram114Digital Isolation115Benefits of an Isolated DAQ Device115Reducing Common-Mode Noise116Chapter 10 Digital Routing and Clock Generation117Clock Routing117Figure 10-1. M Series Clock Routing Circuitry11780 MHz Timebase11820 MHz Timebase118100 kHz Timebase118External Reference Clock11810 MHz Reference Clock119Synchronizing Multiple Devices119Real-Time System Integration Bus (RTSI)119RTSI Connector Pinout120Figure 10-2. NI 6238/6239 RTSI Pinout120Table 10-1. RTSI Signal Descriptions121Using RTSI as Outputs121Using RTSI Terminals as Timing Input Signals122RTSI Filters122Table 10-2. Filters123Figure 10-3. Filter Example123PXI Clock and Trigger Signals123PXI_CLK10124PXI Triggers124PXI_STAR Trigger124PXI_STAR Filters124Table 10-3. Filters125Figure 10-4. Filter Example125Chapter 11 Bus Interface127DMA Controllers127PXI Considerations128PXI Clock and Trigger Signals128PXI and PXI Express128Using PXI with CompactPCI129Data Transfer Methods129Direct Memory Access (DMA)129Interrupt Request (IRQ)130Programmed I/O130Changing Data Transfer Methods between DMA and IRQ130Chapter 12 Triggering131Triggering with a Digital Source131Figure 12-1. Falling-Edge Trigger131Appendix A Device-Specific Information133Figure A-1. NI 6238 Pinout134Table A-1. NI 6238 Device Default NI-DAQmx Counter/Timer Pins134Figure A-2. NI 6239 Pinout137Table A-2. NI 6239 Device Default NI-DAQmx Counter/Timer Pins137Appendix B Troubleshooting140Figure B-1. ai/SampleClock and ai/ConvertClock141Appendix C Technical Support and Professional Services143Glossary145Numbers/Symbols145A145B-C147D149E151F152G-I153K-M155N156O-P157Q-R158S159T161U-V162W163Index164Symbols164Numerics164A164B-C165D166E-G167H-M168N-P169Q-S170T171文件大小: 2.8 MB页数: 172Language: English打开用户手册