用户手册 — NEC PD75P402

目录

• DOCUMENT INFORMATION

  1
  • Cover

    1
  • NEC Statement

    2
  • Major Revisions in This Version

    3
  • PREFACE

    4
  • CONTENTS

    6
  • CONTENTS OF FIGURES

    9
  • CONTENTS OF TABLES

    11
• CH 1. GENERAL

  12
  • OUTLINE OF FUNCTIONS

    13
  • ORDERING INFORMATION AND QUALITY GRADE

    14
  • DIFFERENCES BETWEEN uPD75402A AND uPD75402, 75P402

    15
  • BLOCK DIAGRAM

    16
  • PIN CONFIGURATION

    17
    • 28-Pin Plastic Dip (600 mil), Shrink Dip (400 mil)

      17
    • 44-Pin Plastic QFP (10mm)

      19
• CH 2. PIN FUNCTIONS

  21
  • uPD75402A PIN FUNCTION LIST

    22
    • Port Pin List

      22
    • List of Pins Other Than Port Pins

      23
  • NORMAL OPERATING MODE

    24
    • P00 to P03 (Port 0), P10, P12 (Port 1)

      24
    • P20 to P23 (Port 2), P30 to P33 (Port 3), P50 to P53 (Port 5), P60 to P63 (Port 6)

      25
    • SCK, SO/SB0, SI

      25
    • INT0

      25
    • INT2

      25
    • PCL

      25
    • X1, X2

      26
    • RESET (Reset)

      26
    • VDD

      26
    • VSS

      26
  • PROM MODE

    27
    • A0 to A14 (Address)

      27
    • O0 to O7 (Data)

      27
    • CE (Chip Enable)

      27
    • MenuMenuMenuMenuOE (Output Enable)

      27
    • VPP

      27
    • VDD

      27
    • VSS

      27
  • PIN INPUT/OUTPUT CIRCUITS

    28
  • UNUSED PIN TREATMENT

    31
  • NOTES ON USE OF P00 PIN AND RESET PIN

    31
• CH 3. FEATURES OF ARCHITECTURE AND MEMORY MAP

  32
  • DATA MEMORY BANK CONFIGURATION AND ADDRESSING MODES

    32
    • Data Memory Bank Configuration

      32
    • Data Memory Addressing Modes

      35
  • MEMORY-MAPPED I/O

    39
• CH 4. INTERNAL CPU FUNCTIONS

  42
  • PROGRAM COUNTER (PC)

    42
  • PROGRAM MEMORY (ROM)

    43
  • DATA MEMORY (RAM)

    44
  • GENERAL REGISTER

    46
  • ACCUMULATOR

    47
  • STACK POINTER (SP)

    48
  • PROGRAM STATUS WORD (PSW)

    50
• CH 5. PERIPHERAL HARDWARE FUNCTIONS

  52
  • DIGITAL INPUT/OUTPUT PORTS

    52
    • Digital Input/Output Port Types, Characteristics and Configuration

      53
    • Input/Output Mode Setting

      57
    • Digital Input/Output Port Handling Instructions

      58
    • Digital Input/Output Port Operations

      60
    • Internal Pull-up Resistors

      62
    • Digital Input/Output Port Input/Output Timing

      64
  • CLOCK GENERATION CIRCUIT

    65
    • Clock Generation Circuit Configuration

      65
    • Clock Generation Circuit Function and Operaion

      66
    • CPU Clock Setting

      70
    • Differences Between uPD75402A and uPD75402

      72
  • CLOCK OUTPUT CIRCUIT

    74
    • Clock Output Circuit Configuration

      74
    • Clock Output Mode Register (CLOM)

      75
    • Clock Output Procedure

      76
    • Examle of Remote Control Application

      76
  • BASIC INTERVAL TIMER

    77
    • Basic Interval Timer Configuration

      77
    • Basic Intercal Timer Mode Register (BTM)

      78
    • Basic Interval Timer Operation

      79
    • Examples of Basic Interval Timer Applications

      80
  • SERIAL INTERFACE

    81
    • Serial Interface Functions

      81
    • Serial Interface Configuration

      82
    • Register Functions

      85
    • Operation-Halted Mode

      94
    • 3-Wire Serial I/O Mode Operation

      95
    • SBI Mode Operation

      104
• CH 6. INTERRUPT FUNCTIONS

  137
  • INTERRUPT CONTROL CIRCUIT CONFIGURATION

    137
  • INTERRUPT SOURCE TYPES AND VECTOR TABLE

    139
  • INTERRUPT CONTROL CIRCUIT HARDWARE

    140
  • INTERRUPT SEQUENCE

    145
  • MACHINE CYCLES BEFORE INTERRUPT SERVICING

    146
  • INTERRUPT APPLICATIONS

    148
• CH 7. STANDBY FUNCTION

  152
  • STANDBY MODE SETTING AND OPERATION STATES

    153
  • STANDBY MODE RESET

    154
  • OPERATION AFTER STANDBY MODE RESET

    156
  • STANDBY MODE APPLICATION

    156
• CH 8. RESET FUNCTION

  157
• CH 9. INSTRUCTION SET

  159
  • SPECIAL INSTRUCTIONS

    160
    • Bit Manipulation Instructions

      160
    • Stack Instructions

      160
    • Base Correction Instructions

      161
    • Skip Instruction and Number of Machine Cycles Required by Skip

      161
  • INSTRUCTION SET AND ITS OPERATION

    162
  • OPERATION CODE OF EACH INSTRUCTION

    167
  • INSTRUCTION FUNCTIONS AND APPLICATION

    170
    • Move Instructions

      170
    • Table Reference Instructions

      173
    • Arithmetic and Logic Instructions

      174
    • Accumulator Operation Instructions

      176
    • Increment/Decrement Instructions

      177
    • Compare Instructions

      178
    • Carry Flag Operation Instructions

      179
    • Bit Manipuration Instructions

      180
    • Branch Instructions

      182
    • Subroutine Stack Control Instructions

      183
    • Interrupt Control Instructions

      185
    • Input/Output Instructions

      186
    • CPU Control Instructions

      187
• APPENDIX A. TABLE OF INSTRUCTION USABLE WITH EVAKIT-75X ONLY

  188
• APPENDIX B. DEVELOPMENT TOOLS

  190
• APPENDIX C. MASK ROM ORDERING PROCEDURE

  193
• APPENDIX D. INSTRUCTION INDEX (ALPHABETIC ORDER)

  194
• APPENDIX E. HARDWARE INDEX (ALPHABETIC ORDER)

  195