用户手册 — Samsung M395T2863QZ4

目录

• 1.0 Features

  4
• 2.0 FBDIMM Generals

  5
  • 2.1 FBDIMM Operation Overview

    5
  • 2.2 FBDIMM Channel Frequency Scaling

    6
  • 2.3 FBDIMM Clocking Scheme

    7
  • 2.4 FBDIMM Protocol

    7
  • 2.5 Southbound Command Delivery

    8
  • 2.6 Basic Timing Diagram

    9
  • 2.7 Advanced Memory Buffer Block Diagram

    11
  • 2.8 Interfaces

    12
• 3.0 FBD HIGH-SPEED DIFFERENTIAL POINT TO POINT LINK (at 1.5 V) INTERFACE

  12
  • 3.1 DDR2 Channel

    12
  • 3.2 SMBus Slave Interface

    12
  • 3.3 FBD Channel Latency

    13
  • 3.4 Peak Theoretical Throughput

    13
  • 3.5 Hot-add

    13
  • 3.6 Hot remove

    13
  • 3.7 Hot replace

    13
• 4.0 Pin Configuration

  14
• 5.0 FBDIMM Functional Block Diagram

  16
  • 5.1 1GB, 128Mx72 Module - M395T2863QZ4

    16
  • 5.2 2GB, 256Mx72 Module - M395T5663QZ4

    17
  • 5.3 4GB, 512Mx72 Module - M395T5160

    18
  • 5.4 4GB, 512Mx72 Module - M395T5163QZ4

    19
  • 5.5 8GB, 1Gx72 Module - M395T1G60QJ4

    21
• 6.0 Electrical Characteristics

  23
• 7.0 CHANNEL INITIALIZATION

  32
• 8.0 Physical Dimensions :

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  • 8.1 128Mbx8 based 128Mx72 Module (1 Rank)

    33
  • 8.2 128Mbx8 based 256Mx72 Module (2 Ranks)

    35
  • 8.3 256Mbx4 based 512Mx72 Module (2 Ranks)

    37
  • 8.4 128Mbx8 based 512Mx72 Module (4 Ranks)

    39
  • 8.5 256Mbx4 based 1Gx72 Module (4 Ranks)

    41