数据表 (CDCLVP2104EVM)目录Low Additive Phase Noise Clock Buffer Evaluation Board11 General Description22 Signal Path and Control Circuitry23 Getting Started23.1 Power-Supply Connections24 Input Clock Selection24.1 Configuring Single-Ended Input25 Output Clock36 Schematics and Layout3Important Notices5文件大小: 444.9 KB页数: 6Language: English打开用户手册