数据表 (PGA450Q1EVM)目录Read This First5About This Manual5EVM Overview5CAUTION5Power-Supply Requirements and Connections6Power Supply6Controlling and Powering the PGA450-Q1 EVM via the USB Interface Board6Connecting the Transducer6PGA450-Q1 EVM Set-Up6Jumper Settings7Jumpers7Default Jumper Settings70-Ω Resistors7Jumpers7Default Jumper Settings7Default 0-Ω Resistor Setting7Socket for Programming OTP8Transformer and Transducer8PGA450-Q1 Communication Interfaces8SPI8LIN8PGA450-Q1 With Transformer and Connector for Connecting the Transformer8UART9LIN Master Transceiver9RS232 Transceiver910.1 Using the Register Grids to Manipulate the Register Spaces10ZERO GRID10DESELECT GRID10SAVE GRID10RECALL GRID10READ SELECTED10WRITE SELECTED10READ ALL10WRITE ALL1010.2 ESFR Registers1110.3 EEPROM Registers11Program EEPROM11Reload EEPROM1110.4 RAM1110.5 OTP11Load .HEX File Into GUI12Program OTP Memory from .HEX File12Verify OTP Programming12Loading a .HEX File Into the GUI12Check OTP Status1310.6 DEVRAM13OTP Memory Successful Programming Verification1310.7 FIFO/ECHO14FIFO14OTP Memory can be programmed while programming the Development RAM14EVAL Monitor15Echo Data Stored in FIFO RAM Plotted in Excel15LIN Master16LIN Master on GUI16Use Case1712.11712.218Evaluation Tab Setting18Echo Analog Waveform Output (Channel1), Drive voltage (Channel 2)19DAC Output of Filtered Signal (Channel 2) and Drive Voltage (Channel 1)20PGA450-Q1 EVM Schematics and Layout Drawings21Schematic, LIN21Schematic, Power21Schematic, RS23222Schematic, USB Controller22Schematic, PGA450-Q123PCB Layout, Bottom24PCB Layout, Top24文件大小： 9.0 MB页数： 29Language: English打开用户手册
