Samsung M395T5160QZ4 M395T5160QZ4-CF760 Benutzerhandbuch
Produktcode
M395T5160QZ4-CF760
Rev. 1.4 May 2009
FBDIMM
DDR2 SDRAM
32 of 42
7.0 CHANNEL INITIALIZATION
This chapter defines the process of initializing the FBD channel. The FBD initialization process generally follows the top to bottom se-
quence of state transitions shown in the high level AMB Initialization Flow diagram in Figure The host must sequence the AMB devices
through the Disable, (back to Disable), Training, Testing, and Polling states in order to transition the AMBs into the active channel L0 state.
The value in parenthesis in each state bubble indicates the condition/activity of the links during these states.
quence of state transitions shown in the high level AMB Initialization Flow diagram in Figure The host must sequence the AMB devices
through the Disable, (back to Disable), Training, Testing, and Polling states in order to transition the AMBs into the active channel L0 state.
The value in parenthesis in each state bubble indicates the condition/activity of the links during these states.
Figure 13. AMB Initialization Flow Diagram
The states in the AMB Initialization Flow diagram are :
Disable - The channel is inactive and the interface signals are in a low power Electrical Idle condition.
Training - The initial bit alignment and frame alignment training is done in this state.
Testing - Each bit lane is individually tested in this state.
Polling - The channel capabilities of the individual AMB devices are communicated in this state.
Config - The channel width configuration is communicated to the AMB devices in this state.
L0 - The channel is active and frames of information are flowing between the host and the AMB devices.
Recalibrate - The channel is momentarily idled to allow TX and Rx circuits to be recalibrated.
L0s - The channel is in a low-latency power saving condition. (Optional)
Disable - The channel is inactive and the interface signals are in a low power Electrical Idle condition.
Training - The initial bit alignment and frame alignment training is done in this state.
Testing - Each bit lane is individually tested in this state.
Polling - The channel capabilities of the individual AMB devices are communicated in this state.
Config - The channel width configuration is communicated to the AMB devices in this state.
L0 - The channel is active and frames of information are flowing between the host and the AMB devices.
Recalibrate - The channel is momentarily idled to allow TX and Rx circuits to be recalibrated.
L0s - The channel is in a low-latency power saving condition. (Optional)
Each bit lane is initialized (mosly) independently to support fault tolerance. The transitions in the figure represent the transitions of the
AMB core logic state machine and are taken when the transition event is detected on the minimum required number of thousand bit lanes.
The chain of FBD links connecting the host the AMBs must each be initialized to esabish the timing for broadcasting data frames in the
southbound direction and for merging data frame in the northbound direction. The AMBs on the channel are generally initialized as a group
but because each AMB is individually addressable many alternate may alternate initialization sequences may be employed.
AMB core logic state machine and are taken when the transition event is detected on the minimum required number of thousand bit lanes.
The chain of FBD links connecting the host the AMBs must each be initialized to esabish the timing for broadcasting data frames in the
southbound direction and for merging data frame in the northbound direction. The AMBs on the channel are generally initialized as a group
but because each AMB is individually addressable many alternate may alternate initialization sequences may be employed.
Training
(TS0)
Disable
(EI)
Calibrate
(1’s)
Recalibrate
(NOP2)
Testing
(TS1)
Polling
(TS2)
Config
(TS3)
L0
(EI)
L0s
(EI)
Power-up