Lucent Technologies Release 7 User Manual
DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
Maintenance for R7r
555-230-126
Issue 4
June 1999
Maintenance Commands
8-214
set vector
8
Simplex SPE
When a system restart occurs on a system with simplex (SPE) with the
corresponding vector bit set, the core dump is written to the primary MSS device.
Once the core dump is written, the vector is cleared and the restart is performed.
When a WARM restart (reset system 1) is performed and the vector is set for
WARM restarts, a COLDII is executed after the WARM restart in order to recover
the packet interface circuit pack. Packet interface recovery is necessary due to
delays of writing the core dump.
corresponding vector bit set, the core dump is written to the primary MSS device.
Once the core dump is written, the vector is cleared and the restart is performed.
When a WARM restart (reset system 1) is performed and the vector is set for
WARM restarts, a COLDII is executed after the WARM restart in order to recover
the packet interface circuit pack. Packet interface recovery is necessary due to
delays of writing the core dump.
Duplicated SPE Options
Feature Interactions
In a simplex SPE system, service will be disrupted while a core dump is being
written to the primary Mass Storage System device. In addition, service will
continue to be disrupted until the software is restarted at an appropriate level.
These “disruption” times will vary depending upon the particular switch
configuration.
written to the primary Mass Storage System device. In addition, service will
continue to be disrupted until the software is restarted at an appropriate level.
These “disruption” times will vary depending upon the particular switch
configuration.
If a core dump file already exists, a subsequent core dump will overwrite it.
If the disk is not accessible, a core dump cannot be executed.
spe-active
The active SPE will perform a core dump. When a WARM restart (reset
system 1) is performed and the vector is set for WARM restarts, a COLDII
is executed after the WARM restart in order to recover the packet
interface circuit pack. This packet interface recovery is necessary due to
the delays of writing the core dump
system 1) is performed and the vector is set for WARM restarts, a COLDII
is executed after the WARM restart in order to recover the packet
interface circuit pack. This packet interface recovery is necessary due to
the delays of writing the core dump
spe-standby
The standby SPE will perform a core dump after its memory has been
refreshed. When a WARM restart (reset system 1) is performed and the
vector is set for WARM restarts, a COLDII is executed after the WARM
restart in order to recover the packet interface circuit pack. This packet
interface recovery is necessary due to the delays of refreshing the
standby processor.
refreshed. When a WARM restart (reset system 1) is performed and the
vector is set for WARM restarts, a COLDII is executed after the WARM
restart in order to recover the packet interface circuit pack. This packet
interface recovery is necessary due to the delays of refreshing the
standby processor.
spe-maint
The standby SPE will perform a core dump without refreshing its memory
first. This option is the default on a duplicated system.
first. This option is the default on a duplicated system.
spe-smm
The standby SPE will perform a core dump. This allows a dump of the
Standby Maintenance Monitor (SMM) when the standby SPE is
experiencing problems. If an interchange occurs after the standby
(spe-smm) SPE vector has been set, a core dump will not be performed
on either the new active SPE or the new standby SPE regardless of the
level of restart that occurs. However, if another interchange occurs
making the new active SPE the standby SPE once again, a core dump on
the standby SPE will occur if the standby restarts at the appropriate level.
Standby Maintenance Monitor (SMM) when the standby SPE is
experiencing problems. If an interchange occurs after the standby
(spe-smm) SPE vector has been set, a core dump will not be performed
on either the new active SPE or the new standby SPE regardless of the
level of restart that occurs. However, if another interchange occurs
making the new active SPE the standby SPE once again, a core dump on
the standby SPE will occur if the standby restarts at the appropriate level.