Emerson ATCA-9305 User Manual
Cavium Processor Complex:
StratixGX Interconnect
3-13
Version Register
This read-only register tracks the PLD versions. The version is hard coded in the PLD and
changes with every released code change. Version starts at 01
changes with every released code change. Version starts at 01
16
.
Register 3-8:
Version (0x7)
Scratch Register
All registers in this range act as the same register.
Register 3-9:
Scratch (0x8-0x3F)
Read Example:
To read the FPGA bridge SPI_COMMAND register at 0x204, use the following commands.
Set address bits 9:8.
=>write64b 1d030004 02
Set address bits 7:0.
=>write64b 1d030005 04
1
W
Read
0
W
Write
Bits:
R/W:
Function:
7
R
0x01
6
R
5
R
4
R
3
R
2
R
1
R
0
R
Bits:
R/W:
Function:
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
R/W
Bits:
R/W:
Function: