Emerson CC1000DM User Manual
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P M C / P C I I N T E R F A C E
PCI 6254 Configuration Registers
3-7
28h
Prefetchable Memory Base Upper 32 Bits
2Ch
Prefetchable Memory Limit Upper 32 Bits
30h
I/O Limit Upper 16 Bits
I/O Base Upper 16 Bits
34h
reserved
ECP Pointer
38h
reserved
3Ch
Bridge Control
Interrupt Pin
reserved
40h
Arbiter Control
Diagnostic Control
Chip Control
44h
Miscellaneous Options
Time-out Control
Primary Flow Through
Control
48h
Secondary Incremental
Prefetch Count
Primary Incremental
Prefetch Count
Secondary Prefetch Line
Count
Primary Prefetch Line
Count
4Ch
reserved
Secondary Flow Through
Control
Secondary Maximum
Prefetch Count
Primary Maximum Prefetch
Count
50h
reserved
Test Register
Internal Arbiter Control
54h
EEPROM Data
EEPROM Address
EEPROM Control
58h
reserved
64h
GPIO[3-0] Input Data
GPIO[3-0] Output Enable
Control
GPIO[3-0] Output Data
P_SERR* Event Disable
68h
Clkrun Register
P_SERR* Status
Clock Control
6Ch
Private Memory Limit
Private Memory Base
70h
Private Memory Base Upper 32 Bits
74h
Private Memory Limit Upper 32 Bits
78h
reserved
9Ch
GPIO[7-4] Input Dataport
GPIO[7-4] Output Enable
GPIO[7-4] Output Data
Hot Swap Switch ROR
Control
A0h
GPIO[15-8] Input Dataport
GPIO[15-8] Output Enable
GPIO[15-8] Output Data
Power-up Status