Emerson CC1000DM User Manual
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P M C / P C I I N T E R F A C E
PCI 6254 Configuration Registers
3-9
38h
reserved
3Ch
Primary Maximum Latency
Primary Minimum Grant
Primary Interrupt Pin
Primary Interrupt Line
40h
Device ID
Vendor ID
44h
Secondary Status
Secondary Command
48h
Class Code
Revision ID
4Ch
BIST
Header Type
Secondary Latency Timer
Secondary Cache Line Size
50h
Upstream I/O or Memory 0 Bar
54h
Upstream Memory 1 Bar
58h
Upstream Memory 2 Bar or Upstream Memory 1 Bar Upper 32 bits
5Ch
reserved
6Ch
Subsystem ID
Subsystem Vendor ID
70h
reserved
74h
reserved
Capability Pointer
78h
reserved
7Ch
Secondary Max Latency
Secondary Minimum Grant
Secondary Interrupt Pin
Secondary Interrupt Line
80h
XB Downstream Configuration Address
84h
XB Downstream Configuration Dataport
88h
XB Upstream Configuration Address
8Ch
XB Upstream Configuration Dataport
90h
reserved
XB Config Access
Semaphore Status
XB Upstream Config Own
Semaphore
XB Downstream Config
Own Semaphore
94h
reserved
SERR* Event Disable
Clock Control
98h
GPIO[3-0] Input Data
GPIO[3-0] Output Enable
Control
GPIO[3-0] Output Data
SERR* Status