Fujitsu CM71-00101-5E User Manual
185
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.88
CALL (Call Subroutine)
This is a branching instruction with no delay slot.
After storing the address of the next instruction in the return pointer (RP), branch to the
address indicated by "lavel12" relative to the value of the program counter (PC). When
calculating the address, double the value of "rel11" as a signed extension.
After storing the address of the next instruction in the return pointer (RP), branch to the
address indicated by "lavel12" relative to the value of the program counter (PC). When
calculating the address, double the value of "rel11" as a signed extension.
■
CALL (Call Subroutine)
Assembler format:
CALL label12
Operation:
PC + 2
→
RP
PC +2 + exts (rel11 × 2)
→
PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
2 cycles
Instruction format:
Example:
CALL label
...
label: ; CALL instruction address + 122
H
N
Z
V
C
–
–
–
–
MSB
LSB
1
1
0
1
0
rel11
PC
PC
F F 8 0 0 0 0 0
F F 8 0 0 1 2 2
F F 8 0 0 0 0 4
x x x x
x x x x
RP
RP
Before execution
After execution
Instruction bit pattern : 1101 0000 1001 0000