Fujitsu CM71-00101-5E User Manual
186
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.89
CALL (Call Subroutine)
This is a branching instruction with no delay slot.
After storing the address of the next instruction in the return pointer (RP), a branch to
the address indicated by "Ri" occurs.
After storing the address of the next instruction in the return pointer (RP), a branch to
the address indicated by "Ri" occurs.
■
CALL (Call Subroutine)
Assembler format:
CALL @Ri
Operation:
PC + 2
→
RP
Ri
→
PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
2 cycles
Instruction format:
Example:
CALL @R1
N
Z
V
C
–
–
–
–
MSB
LSB
1
0
0
1
0
1
1
1
0
0
0
1
Ri
R1
F F F F F 8 0 0
8 0 0 0
F F F E
F F F F F 8 0 0
F F F F F 8 0 0
PC
8 0 0 1
0 0 0 0
RP
R1
PC
RP
x x x x
Before execution
After execution
x x x x
Instruction bit pattern : 1001 0111 0001 0001