Fujitsu CM71-00101-5E User Manual
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INDEX
Interlocking Produced by Reference to "R15" and
General-purpose Registers after Changing
the "S" Flag
the "S" Flag
Overview of General-purpose Registers
Special Uses of General-purpose Registers
H
Hazards
Overview of Register Hazards
I
ILM
Interrupt Level Mask Register (ILM: Bit 20 to bit 16)
Immediate Data
ADD (Add 4-bit Immediate Data to Destination
Register)
ADD2 (Add 4-bit Immediate Data to Destination
Register)
ADDN (Add Immediate Data to Destination Register)
ADDN2 (Add Immediate Data to Destination
Register)
ADDSP (Add Stack Pointer and Immediate Data)
ANDCCR (And Condition Code Register and
Immediate Data)
BANDH (And 4-bit Immediate Data to Higher 4 Bits
of Byte Data in Memory)
BANDL (And 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)
BEORH (Eor 4-bit Immediate Data to Higher 4 Bits of
Byte Data in Memory)
BEORL (Eor 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)
BORH (Or 4-bit Immediate Data to Higher 4 Bits of
Byte Data in Memory)
BORL (Or 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)
ORCCR (Or Condition Code Register and Immediate
Indirect Address
DMOV (Move Word Data from Post Increment
Register Indirect Address to Direct Address)
DMOVB (Move Byte Data from Post Increment
Register Indirect Address to Direct Address)
DMOVH (Move Half-word Data from Post Increment
Register Indirect Address to Direct Address)
Instruction
"INT" Instruction Operation
"INTE" Instruction Operation
"PC" Values Saved for "INT" Instruction Execution
"PC" Values Saved for "INTE" Instruction Execution
"PC" Values Saved for Undefined Instruction
Examples of Processing Delayed Branching
Instructions
Examples of Processing Non-delayed Branching
Instructions
Examples of Programing Delayed Branching
Instructions
General-purpose Registers during Execution of
"COPST/COPSV" Instructions
How to Use Undefined Instruction Exceptions
Instruction Formats
Instruction Lists
Instruction Notation Formats
Instructions Prohibited in Delay Slots
Operations of Undefined Instruction Exceptions
Overview of Branching with Delayed Branching
Instructions
Overview of Branching with Non-delayed Branching
Instructions
Overview of the "INT" Instruction
Overview of the "INTE" Instruction
Overview of Undefined Instruction Exceptions
Precautionary Information for Use of "INT"
Instructions
Precautionary Information for Use of "INTE"
Instructions
Restrictions on Interrupts during Processing of
Delayed Branching Instructions
Symbols Used in Instruction Lists
Time to Start of Trap Processing for "INT"
Instructions
Time to Start of Trap Processing for "INTE"
Instructions
Time to Start of Undefined Instruction Exception
Processing
Undefined Instructions Placed in Delay Slots
Use of Operand Information Contained in Instructions
Instruction Execution
"PC" Values Saved for "INT" Instruction Execution
"PC" Values Saved for "INTE" Instruction Execution
Instruction Map
Instruction Map
INT
"INT" Instruction Operation
"PC" Values Saved for "INT" Instruction Execution
INT (Software Interrupt)
Overview of the "INT" Instruction