Intel 253668-032US User Manual
6-22 Vol. 3
INTERRUPT AND EXCEPTION HANDLING
clear, indicates that the index refers to a descriptor in the GDT or the
current LDT.
current LDT.
TI
GDT/LDT (bit 2) — Only used when the IDT flag is clear. When set,
the TI flag indicates that the index portion of the error code refers to
a segment or gate descriptor in the LDT; when clear, it indicates that
the index refers to a descriptor in the current GDT.
the TI flag indicates that the index portion of the error code refers to
a segment or gate descriptor in the LDT; when clear, it indicates that
the index refers to a descriptor in the current GDT.
The segment selector index field provides an index into the IDT, GDT, or current LDT
to the segment or gate selector being referenced by the error code. In some cases
the error code is null (that is, all bits in the lower word are clear). A null error code
indicates that the error was not caused by a reference to a specific segment or that a
null segment descriptor was referenced in an operation.
The format of the error code is different for page-fault exceptions (#PF). See the
“Interrupt 14—Page-Fault Exception (#PF)” section in this chapter.
The error code is pushed on the stack as a doubleword or word (depending on the
default interrupt, trap, or task gate size). To keep the stack aligned for doubleword
pushes, the upper half of the error code is reserved. Note that the error code is not
popped when the IRET instruction is executed to return from an exception handler, so
the handler must remove the error code before executing a return.
Error codes are not pushed on the stack for exceptions that are generated externally
(with the INTR or LINT[1:0] pins) or the INT n instruction, even if an error code is
normally produced for those exceptions.
to the segment or gate selector being referenced by the error code. In some cases
the error code is null (that is, all bits in the lower word are clear). A null error code
indicates that the error was not caused by a reference to a specific segment or that a
null segment descriptor was referenced in an operation.
The format of the error code is different for page-fault exceptions (#PF). See the
“Interrupt 14—Page-Fault Exception (#PF)” section in this chapter.
The error code is pushed on the stack as a doubleword or word (depending on the
default interrupt, trap, or task gate size). To keep the stack aligned for doubleword
pushes, the upper half of the error code is reserved. Note that the error code is not
popped when the IRET instruction is executed to return from an exception handler, so
the handler must remove the error code before executing a return.
Error codes are not pushed on the stack for exceptions that are generated externally
(with the INTR or LINT[1:0] pins) or the INT n instruction, even if an error code is
normally produced for those exceptions.
6.14
EXCEPTION AND INTERRUPT HANDLING IN 64-BIT
MODE
In 64-bit mode, interrupt and exception handling is similar to what has been
described for non-64-bit modes. The following are the exceptions:
described for non-64-bit modes. The following are the exceptions:
•
All interrupt handlers pointed by the IDT are in 64-bit code (this does not apply to
the SMI handler).
the SMI handler).
•
The size of interrupt-stack pushes is fixed at 64 bits; and the processor uses
8-byte, zero extended stores.
8-byte, zero extended stores.
Figure 6-6. Error Code
31
0
Reserved
I
D
T
T
I
1
2
3
Segment Selector Index
E
X
T
X
T