Intel 253668-032US User Manual
7-16 Vol. 3
TASK MANAGEMENT
The TS (task switched) flag in the control register CR0 is set every time a task switch
occurs. System software uses the TS flag to coordinate the actions of floating-point
unit when generating floating-point exceptions with the rest of the processor. The TS
flag indicates that the context of the floating-point unit may be different from that of
the current task. See Section 2.5, “Control Registers”, for a detailed description of
the function and use of the TS flag.
occurs. System software uses the TS flag to coordinate the actions of floating-point
unit when generating floating-point exceptions with the rest of the processor. The TS
flag indicates that the context of the floating-point unit may be different from that of
the current task. See Section 2.5, “Control Registers”, for a detailed description of
the function and use of the TS flag.
7.4 TASK
LINKING
The previous task link field of the TSS (sometimes called the “backlink”) and the NT
flag in the EFLAGS register are used to return execution to the previous task.
EFLAGS.NT = 1 indicates that the currently executing task is nested within the
execution of another task.
When a CALL instruction, an interrupt, or an exception causes a task switch: the
processor copies the segment selector for the current TSS to the previous task link
field of the TSS for the new task; it then sets EFLAGS.NT = 1. If software uses an
IRET instruction to suspend the new task, the processor checks for EFLAGS.NT = 1;
it then uses the value in the previous task link field to return to the previous task. See
Figures 7-8.
When a JMP instruction causes a task switch, the new task is not nested. The
previous task link field is not used and EFLAGS.NT = 0. Use a JMP instruction to
dispatch a new task when nesting is not desired.
flag in the EFLAGS register are used to return execution to the previous task.
EFLAGS.NT = 1 indicates that the currently executing task is nested within the
execution of another task.
When a CALL instruction, an interrupt, or an exception causes a task switch: the
processor copies the segment selector for the current TSS to the previous task link
field of the TSS for the new task; it then sets EFLAGS.NT = 1. If software uses an
IRET instruction to suspend the new task, the processor checks for EFLAGS.NT = 1;
it then uses the value in the previous task link field to return to the previous task. See
Figures 7-8.
When a JMP instruction causes a task switch, the new task is not nested. The
previous task link field is not used and EFLAGS.NT = 0. Use a JMP instruction to
dispatch a new task when nesting is not desired.
DS, ES, FS, and GS segments are present in memory. #NP
New Data Segment
DS, ES, FS, and GS segment DPL greater than or
equal to CPL (unless these are
conforming segments).
#TS
New Data Segment
NOTES:
1. #NP is segment-not-present exception, #GP is general-protection exception, #TS is invalid-TSS
exception, and #SS is stack-fault exception.
2. The error code contains an index to the segment descriptor referenced in this column.
3. A segment selector is valid if it is in a compatible type of table (GDT or LDT), occupies an address
3. A segment selector is valid if it is in a compatible type of table (GDT or LDT), occupies an address
within the table's segment limit, and refers to a compatible type of descriptor (for example, a seg-
ment selector in the CS register only is valid when it points to a code-segment descriptor).
Table 7-1. Exception Conditions Checked During a Task Switch (Contd.)
Condition Checked
Exception
1
Error Code
Reference
2