Intel 253668-032US User Manual

15-50   Vol. 3

MACHINE-CHECK ARCHITECTURE

If MISCV in IA32_MCi_STATUS 

THEN

SAVE IA32_MCi_MISC;

FI;

IF ADDRV in IA32_MCi_STATUS

THEN

SAVE IA32_MCi_ADDR;

FI;
IF CLEAR_MC_BANK = TRUE

THEN

SET all 0 to IA32_MCi_STATUS;
If MISCV in IA32_MCi_STATUS 

THEN

SET all 0 to IA32_MCi_MISC;

FI;
IF ADDRV in IA32_MCi_STATUS

THEN

SET all 0 to IA32_MCi_ADDR;

FI;

FI;
CONTINUE:

OD;

( *END FOR *)
RETURN;
(* End of MCA ERROR PROCESSING*)

15.10.4.2   Corrected Machine-Check Handler for Error Recovery

When writing a corrected machine check handler, which is invoked as a 

result of CMCI or called from an OS CMC Polling dispatcher, consider the 

following: 

•

The VAL (valid) flag in each IA32_MCi_STATUS register indicates whether the 
error information in the register is valid. If this flag is clear, the registers in that 
bank does not contain valid error information and does not need to be checked.

•

The CMCI or CMC polling handler is responsible for logging and clearing corrected 
errors. The UC flag in each IA32_MCi_Status register indicates whether the 
reported error was corrected (UC=0) or not (UC=1). 

•

When IA32_MCG_CAP [24] is one, the CMC handler is also responsible for 
logging and clearing uncorrected no-action required (UCNA) errors.  When the 
UC flag is one but the PCC, S, and AR flags are zero in the IA32_MCi_STATUS 
register, the reported error in this bank is an uncorrected no-action required 
(UCNA) error. 

•

In addition to corrected errors and UCNA errors, the CMC handler optionally logs 
uncorrected (UC=1 and PCC=1), software recoverable machine check errors 
(UC=1, PCC=0 and S=1), but should avoid clearing those errors from the MC 
banks. Clearing these errors may result in accidentally removing these errors