Intel SE7501WV2 User Manual

Page of 169
General Specifications 
Intel® Server Board SE7501WV2 TPS 
  
Revision 
1.0 
 
Intel reference number C25653-001 
160
SR1300 Chassis Device(s) 
3.3V 
5.V 
12.V 
-12.V 5.VSB 3.3VSB 
Processors 
  
  
13.A 
  
  
  
Memory DIMMs 
  
  
5.9A 
  
  
  
Server Board 
6.6A 
2.6A  .5A 
.A 
1.4A    
Fans 
  
  
1.8A 
  
  
  
Keyboard/Mouse 
  
.4A 
  
  
  
  
PCI Slots (standby on full height slots only) 2.1A  2.8A .5A 
.5A   
 
.1A 
Peripherals 
  
2.6A  3.5A 
  
  
.1A 
 
Total Current 
8.7A 
8.4A  25.2A 
.5A  1.4A  .2A 
Total Power
Total Power 
28.7W 42.W 302.4W -6.W  7.W 
.5W 
367.7W 
 
10.3  Power Supply Specifications 
This section provides power supply design guidelines for an SE7501WV2-based system, 
including voltage and current specifications, and power supply on/off sequencing 
characteristics.  
Table 97. Intel
®
 Server Board SE7501WV2 Static Power Supply Voltage Specification 
Parameter Min Nom Max Units 
Tolerance 
+3.3 
+3.25 +3.30 +3.35 V
rms
 +1.5/-1.5% 
+5 
+4.90 +5.00 +5.10 V
rms
 +2/-2% 
+12 
+11.76 +12.00 +12.24 V
rms
 +2/-2% 
-12 
-11.40 -12.20 -13.08 V
rms
 +9/-5% 
+5 
VSB 
+4.85 +5.00 +5.20 V
rms
 +4/-3% 
 
Table 98. Intel
®
 Server Board SE7501WV2 Dynamic Power Supply Voltage Specification 
Output Min Max 
Tolerance 
+3.3 V 
3.20 V 
3.46 V 
+5 / -3 % 
+5 V 
4.80 V 
5.25 V 
+5 / -4 % 
+12 V 
11.52 V 
12.6 V 
+5 / -4 % 
+5 V SB 
4.80 V 
5.25 V 
+5/ -4% 
 
10.3.1 Power 
Timing 
This section discusses the timing requirements for operation with a single power supply. The 
output voltages must rise from 10% to within regulation limits (T
vout_rise
) within 5 ms to 70 ms. 
The +3.3 V, +5 V and +12 V output voltages start to rise approximately at the same time. All 
outputs must rise monotonically. The +5 V output must be greater than the +3.3 V output during 
any point of the voltage rise, however, never by more than 2.25 V. Each output voltage shall 
reach regulation within 50 ms (T
vout_on
) of each other and begin to turn off within 400 ms (T
vout_off
of each other. The following figure shows the output voltage timing parameters.