Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet
Product codes
P4X-UPE3210-316-6M1333
DRAM Controller Registers (D0:F0)
102
Datasheet
C1DRB1 = C0DRB3 + Total memory in ch1 rank0 + ch1 rank1 (in 64MB increments)
(rank 1 is the topmost populated rank)
C1DRB2 = C1DRB1
C1DRB3 = C1DRB1
C1DRB3:
C1DRB3 = C0DRB3 + Total memory in Channel 1.
5.2.3
C0DRB1—Channel 0 DRAM Rank Boundary Address 1
B/D/F/Type:
0/0/0/MCHBAR
Address Offset: 202–203h
Default Value:
0000h
Access:
RW/L, RO
Size:
16 bits
See C0DRB0 register.
Bit
Access
Default
Value
Description
15:10
RO
000000b Reserved
9:0
RW/L
000h
Channel 0 Dram Rank Boundary Address 0 (C0DRBA0): This register
defines the DRAM rank boundary for rank0 of Channel 0 (64 MB granularity)
=R0
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
defines the DRAM rank boundary for rank0 of Channel 0 (64 MB granularity)
=R0
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
Bit
Access
Default
Value
Description
15:10
RO
000000b Reserved
9:0
RW/L
000h
Channel 0 Dram Rank Boundary Address 1 (C0DRBA1): This field defines
the DRAM rank boundary for rank1 of Channel 0 (64 MB granularity)
=(R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
the DRAM rank boundary for rank1 of Channel 0 (64 MB granularity)
=(R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.