Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet
Product codes
P4X-UPE3210-316-6M1333
Datasheet
141
DRAM Controller Registers (D0:F0)
5.3
EPBAR
5.3.1
EPESD—EP Element Self Description
B/D/F/Type:
0/0/0/PXPEPBAR
Address Offset: 44–47h
Default Value:
00000201h
Access:
RO, RWO
Size:
32 bits
This register provides information about the root complex element containing this Link
Declaration Capability.
Table 11.
EPBAR Address Map
Address
Offset
Register
Symbol
Register Name
Default
Value
Access
44–47h
EPESD
EP Element Self Description
00000201h
RO, RWO
50–53h
EPLE1D
EP Link Entry 1 Description
01000000h
RO, RWO
58–5Fh
EPLE1A
EP Link Entry 1 Address
00000000000
00000h
RO, RWO
60–63h
EPLE2D
EP Link Entry 2 Description
02000002h
RO, RWO
68–6Fh
EPLE2A
EP Link Entry 2 Address
00000000000
08000h
RO
60–63h
EPLE3D
EP Link Entry 3 Description
03000002h
RO, RWO
68–6Fh
EPLE3A
EP Link Entry 3 Address
00000000000
08000h
RO
Bit
Access
Default
Value
Description
31:24
RO
00h
Port Number (PN): This field specifies the port number associated with this
element with respect to the component that contains this element. Value of 00h
indicates to configuration software that this is the default egress port.
element with respect to the component that contains this element. Value of 00h
indicates to configuration software that this is the default egress port.
23:16
RWO
00h
Component ID (CID): Identifies the physical component that contains this
Root Complex Element.
BIOS Requirement: Must be initialized according to guidelines in the PCI
Express* Isochronous/Virtual Channel Support Hardware Programming
Specification (HPS).
Root Complex Element.
BIOS Requirement: Must be initialized according to guidelines in the PCI
Express* Isochronous/Virtual Channel Support Hardware Programming
Specification (HPS).
15:8
RO
03h
Number of Link Entries (NLE): Indicates the number of link entries following
the Element Self Description. This field reports 3 (two each for PCI Express and
one for DMI).
Note: For the 3200 MCH, the field reports 2 link entries (one each for PCI
the Element Self Description. This field reports 3 (two each for PCI Express and
one for DMI).
Note: For the 3200 MCH, the field reports 2 link entries (one each for PCI
Express and DMI).
7:4
RO
0h
Reserved
3:0
RO
1h
Element Type (ET): Indicates the type of the Root Complex Element. Value of
1h represents a port to system memory.
1h represents a port to system memory.